[![English Jobs Logo](/public/img/logo100.png "English Jobs Logo") ### ENGLISH JOBS BELGIUM](/) [post a job](/publish-job) search # 3423 design English-speaking jobs in Belgium Include languages [+] ### Note Some links might not work from outside the European Union. Dismiss [### Mechanical *Design* Engineer](/clickout/0d2e30590fce775b?ql=q&sig=8e58721fa3c4b51fd907176e6bb12c766cb65438&e=8pLbkYztUb01CAffS8EV4GC2iCQxmzsXM0jX7SMB0aCHah4CRO5UUtZTGWBsNFS3BjOO9VLGasdGH0LaJTh7Ywm-yqzoobLsJRwo0XHKLnoPs8u6t0_askHmTcp882a_SP9yVpiCxA-a76a5dz05twAsV4X4zEoiloPn6f6uMFnBWYpg4avNjzNbONCS3GybxQt9TDpp7bTeHm-m6XHnVpWoySgD-jkNmCE5WyyMiU_TE2m0iS6I3q1rr5XTkJEax-aaDlLgi4CbfRTX6PDRDGnYYJU6rZoi9zORjhUB6XwXZ5vP8yXwRXqxJmSblCfMWFeZZw62ruE0HLLzjZ8zqtmZQM0TgbIUGph6Z2nNuff0UjfCtQvDgY5W8sNeqJH36LZotfOG14qP5a7nzqNdMdLUaszsvmrjXF5QelhbJcHxqOW5tFQd4VpfSUSondnD3zaZBNij6K9t-LPy2dkVn1RFpuKlgWx1lKlyi6NOY3i1XQvBKHA8bk6rg50IgGUrLHDpKp5_bGG1UjAPCM30ocLR6mXpO4GFfXWdulQJ5xeMgpqbcHvSI-UPJtr8pe_1688TFfDf_m5vybCpqQzvB8MQKSLNLAQpoJC550-qXnnvUSI8UEVS22tgvv24XPvfrxLEiCEmbCG153NpnF8kHpzP3unAS49FBTYa_3GEGTyz3v0zb3WIhXQenoCM7aWjYDREpt7dwKHqEQhq93dO_bJsT2MWPW6aIXixA-al3nuxDjKCVRTR-3OVdSy9YwdtbUmtnsv-0uvShBTIAY5TLWxnxagEXC8J9EzVXpLKpelviFDCjlKVQ9ctQ2hM1-wHaFihZ7qr9dooBXWfeThXKq0kwKAt78ZDSYNUXllJ5YxMTTjV_Jx803ZJ7SGVNglGMuZ8MlOE_LlcxslZlBlxEUDhZ8ywLgOeeJYBIo1b_V7B4A9mmLo6_3eR5UY5b-I6_bGDT9DjxcwJ2R9QLrxIahN730xrNQAT2duLwWC7-KK7VW41qlWc323EvPuPAb3_CDk47wrvpnUlrzUd8nO1FaFG5aRXmxUaeGIhgldCcsQrj8SX86IqXsKhwE4qysBcDHdqXc2mKRQsgBmhouTNrhKDOYrn1p7dDenVOdBcv6JGLf7Av5-LK6aqmcEELlgl3SPMJ-J-nz2HoOpax1U1khMc0yhbqQUphzGt94MglYfXQRo3BJvNCnAep2mmxCYCAvHTsa3f-Z-Om6Ur7JRxLpu_fxlwHdA7eM4NBtdIix2ASOvjdb5JYtudJOZ9-LDmTLw3M4tnLrZIt4NzColRC-UseZ-9VSm2uVqwg0s40enFXLKXN32TLGZ4kJnK9nvpLc-mMvd5xnWuDDFN27Frhmp7gth_Hx-0cQoSLiN1gM9I4Atb91ldPUXPxwFClWvdwCTtW40jFmbvwrKEojydHw&prev=RQ233ED9C80091CC) * SII Group Belgium * Charleroi * May 6 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... as brake systems, steering systems, hydraulics, pneumatics and suspension; Proposing and generating *design* ... or similar technical expertise; Strong knowledge of mechanical parts and computer-aided *design* Experience ... Qualification: You have a master's degree in Mechanical Engineering, Automotive- or Aviation/Aerospace *design* report probem [### Mechanical *Design* Engineer](/clickout/1d5068b0cbea4f8e?ql=q&sig=0bf30977954d2aa5b625aff3c31ff36a885bb457&e=3e5vdeBqenIDGORy-c6XC4mxXBvcJBzoVoB-BCu66-46lKiSJ8NeCBDHgNU_kxZxn4VjdI0wQuBc3xxrXeuaRZIjrv0uav4o-inPPSSXIPA2diFYr7SF1NxaZGsMT5iCWGppcHYXb5nPAZ9NdZcrfg04_swcvnfc7xl2b31310yHIiJpxTZfFa38jACVhjXsxvezf2wnjuAoc_u9se1fsryyHmJXST6HZvLK1hbSuiG9PR3-eyU_vECfRZO1lhmi1azmSFZhPyxjAe9JWy0TPBlEvD38KHntdY09L9UBqaT9lqPRwhhRYog2q0noxAqouGFJ70ubsVdtsRoaMocFB-jb6M_CrZ7p0rdrERBh2Ph_owbE1niELZvxNqM8BHrIVFfRboR6_l2iBWVC-_hD3sXct2t7BHqFtszcuJXQpY0wTIkua9svJ54UtdIrrxTX0cm9jL6tfZiVE2AVpGuWD15jq4QVL47czuEmqY_0nLr0uiio5dqR1SvQt01IG4oVmsF8DtqOtoyf6pT8oc6HHduIcx_IdqQEmwi34Ekkk0cfGrGALIi8k5drNqq_CdZNVT2Sn38P8CLKOBj7O44yrp2eZ2ZDwl-F4J72K-AU-laTk88RRgJ-GueZGrbMEvZZARahdKcQBfNPUvjYxZJUyoHsHNHHDN3bx6HS8zjGx_fIHL1Q3aOI12B-0aeQiUGhtDeWEUSr0vruB_RocO1lEmUx4b8New2jzxAFl5sOh33Lc2WAmVwb2y1qJ3HoWGRhVS62C66NWEPdmWYZa-9bvcIVl0ON3LwH2RM8Uc52xoSZxlEFkExwGTzIVfqTViC6SiiRjNc4xqpIhjy9JMy6BIM4wmtU86_d8skWbr_i7MQptPEqtGw0aOALmj2BEDQkCaTtx75-yqNdCu6KK-oERcgk5zRwNabU2r6k7x9lp7-cHuTIEBE3Y2digD_QB5TbfzIa0wskdgJ20FNGVVMG1le4qACFaO_cw4bYgeJOfa6_iBHmasy37B_pqSTuMlRskL1CpSPULIruA7Q3bdrKkAZEy3fN4DjulBujBf4Q6hN4vROxIjxdDp3mlgpVOWe9kpWJxZ4ySy4k57WItdqdrBI3Tb6HW0mXXTXc2mBq9eutSnep6qiAXKpZIFi9dn5yXwRRYBWSS3leWKVpgOR7SGDyLWr6mUuFFoSI4-5zd8b8CuF7rdd2R6DPuuwcWj2tBJpU9-L_PkGVbk9YbxKoe4NDb3inog1A3a23_107R-iRRIztzd5HegTx9L3_DczuTX5FNLa2Av2Dngk_y8BjSuyOPOHV4kUvDXNWPnHy5qDj3o-F85ZJAP7yPx5j9kYCq8faTLZImya4XONpYJkX-3mM5XWlt9N8g2oUvqaHnxKLC2OdXwgiPs379P2NTnqAi1uqeMeLBQDS6jVL&prev=RQ233ED9C80091CC) * SII Group Belgium * Namur * May 6 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... as brake systems, steering systems, hydraulics, pneumatics and suspension; Proposing and generating *design* ... or similar technical expertise; Strong knowledge of mechanical parts and computer-aided *design* Experience ... Qualification: You have a master's degree in Mechanical Engineering, Automotive- or Aviation/Aerospace *design* report probem [### Mechanical *Design* Engineer](/clickout/a26c098d570d87d9?ql=q&sig=4e9e5232d6b21f94b19366ae20aa13eea860d4c3&e=Jk2uqlncOCIY7kcV4EPZT38AJaI-1ZV-0pWk3E7Fv09pCkah0jIMIY0UGCb17ICH5vsbZmU58IKCKYehAP7lBRCgPFyeJXJvQ6xBSFBFO1NKTR9hvcisnouJBsZS0hKoVgOdvFvIcMQRI3bzrHYRLwbRowa2Ns_Y_ZPXkB7beXUMibGc3Pi972FXdGNT33cMSu7lxMQEE5ftyxbfP6R54VuKFjW9F_E1ADmNFbR7EGx3y0xDjgaWv1UNAzu4mguloSuYWJSvlR7Lj_MDSTnoRZhcOcRkjqCukxNw0Hfbmcapik1azS_Ij6NYxkC2IiEdAkjCB0dW3ln9wb5Tc5_IJ8yNhO3TofEcsT3RL6rtdhTuhXZyJVLmytqihy7Cg5dHewNcczUdsknFr3Wj63DES-1dxcTfUe5v77cEbS7EJVHrIe5RlT5TuAog1PuFsGEpKI8egxmYu3uArKWueaRFE4947F3mj9NPgY8IfSp9RCyFkuj8NfrbnPmrCjT6_LApIqpr4qxJvWRz90HGqVQfJi-_SdzUEf7qRdqyRRE4weJkuHT5J20n_k5tdSUQDoxfuq14u-xsL6o41RIBvIc2Qrwdi_emE8uSg1v11ivbcK9D5MhPJ_Zj89fk4kaGDcds_gFlcZgHcnXqEJT36akWjCNfidgmRXQdxfgP8ptORTMFaeD3-QGsChaxUZ5BI6PRyflJA1cMS3DOkRO_l2Q6FWofNuTc1P06un2JFQF3Vw3xd8gu0few0VlmUt6ztVfLd8L5LHo6ZzHx8dkWrg2yBgLO2bV86XAuzl9xLn5rP-VUCzn0qSZ7Gvno70pcTI2sh0NmgwA9YSmfqWdXt8ZUSM1AvUkpsgDRHHDDKBMz96wcBmhsHPOXjFt6Fc0b1ssyjGX7rqsMty9a3HURYUgaIj5Q0k5BCWGJnvuuOEeRiVE917EY3z8-9hw4ELGZ7kD9D0FV9JXE_y_09RnYofsdK0POGSzWY3Xte1bN7OqfwEoEHUUWYEjIWvUxYfHjRXlZu8PBNLdpVyGrbpm4PfU_2n_c0_lXGg5FffsAUo9jtSXTUvuVb3r1-g5XjpwE2XPnMiHKLfC-OBBRjUQ_WTLBJaTpsQj2lhCV5Mbzwc76TtuvDR_4cBSHIfhvQGv2b_zkkrqbPCy-xMi5apmJnO53B9E6cu_sEf7Tr3-nr86YArIRwnNliDoaSF55qVG2-i7lniWg-ocM6TtRIUHpgXFkW2K0VKgnCE2sRit3lCM99PddgXI2G0nuBMHyAOHQ_rC7UOSOWYRZezX-tdiumduCditHGIunj934TCqrzu9rSlFz4GkY6pKlVscMk10lvjogeu5WmcaBtDR5IcemKdDeZe40d0iWYXs6wEkdz0c42B5cC8A6t_AHy82fXn73mxYQd8tBW5K6Mt1YIMZ4wHX5jXBDbd2U8iE&prev=RQ233ED9C80091CC) * SII Group Belgium * Hainaut Province * May 7 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... as brake systems, steering systems, hydraulics, pneumatics and suspension; Proposing and generating *design* ... or similar technical expertise; Strong knowledge of mechanical parts and computer-aided *design* Experience ... Qualification: You have a master's degree in Mechanical Engineering, Automotive- or Aviation/Aerospace *design* report probem [### Mechanical *Design* Engineer](/clickout/f84bbb9f232f91bd?ql=q&sig=b8be093840b6accde0b997fa693a0db89b0b99c5&e=6d5AOkJXZExF9UIkxXKSoNasUWgra9aC3v1jDQNVzXckxQ0tOyhP6NoFEYbGvy5kpZK3ynFR0KHL2xk6gjY-Gel_Fb-d8BQJlO-b0ICtBoYm7J8T-W_cxNwWHKbzTOqeEIBDDJM8g9gOdRwa1HbWPoWKm4pUgpQI5OT3FZtlArtdE_OJKja6gIFjI3SWVgnbHE50VxT0HOgR4FUYsa3yItEWtm6EGeE8l0mUf6hFkSL0v6_R43yi4dRRmItd61CVl3TiY5UNnnimXpNzDZOJgXaCS-FWNlwLHGYvpxmnbGz8kZZq19DmCw1mwagBz1VY34303nMWpfTmLtEkBhbEg8OssY9liqXJ9M8xEWCaD2Iw3y6PKPybb2yd0-MZBSlEi5F8w-20waOj2nbf77eOy8RIQdV1CDPVijDdGmg2nAXQPZoW-6xmfLPC5pBlzfHL21L20Bw0whRaxRQbHdeYwS0_rIcyhCXjT6Poc_WYoNIp5PxHUIbyvb8ZuRbO6jI8pvXAehEB5EV8xhAgIS0nyxrRXFL7gDHF6cyuWTAqYQI0Dac2Sqi8qLqY95FElnyGWFmXuFHzw7wKHnMoW1SEABWYXEt5CLKLrSBYvgyWT54pYu2QknRy8iimZwcZaZy9edbgCioRIDPLTSo9eDbjDnMG6LPyl68PtidNy-jJUsiTXnX9IziouLJ32AKjLJJKmGWUsFgK5Hy5lgDkFRVcxjSOujHaEWXXU4a7k7MLIlEehfL7wCivw69995nernthldaCsIDfIBuNX-QjzU6woLr1M_8DmS6zFn7D2VsbfNAqg4mg4OKj8m2KLpt9_EHXZXE77IxvWey7KNIjwEtls-JccZMtiVxCYVg-3TSJxMXrAIkxqyWg5p8soISsR1kE2IP4MNPoEjxgkhset9lbjK8hpHaarzXeVvLIEw0HIivasx7T-TUM0VYJYKQ0eEQfkP-VYq8_e6Ae-Exj0SoLeFAw84PvGg3dSDohpYNndLYLlDzLDa31TCq1QcZBXH7VKpPV7vkM6wkInhwpqC4WCQ6h6viZnqViZw6sK-AP7MfajcBIFjKf6ut7XcxdjKf965lAOKaG5HqSxonLWz3l3dUyaVlIQwt35hG3CbBpk6F2nKp30regLH3Gr4PLtaL9DEXSidLdfAORE01OHZdEMh85NuieVQlIaPylHZyGaTY3SEcxY4O-JtrixPTkZqBPQ4MrFO6a85Ee4stsc-tt_mxDgW2PDOQVeDSnSMJnJ7q2YPiO4RaJIV6Gn8jxWvuGXKr7e1oLaG3bkGjDTyAvS5mOXvQNFwhzGLt5TcaM5jxlej6u9wsw2Y29WXbe0Of35U1blTR-qk_y-mDyTOlE7247XRb5j8_lgXMyOzqLUIUwxmFlHOtu836NYQ9D4oU3e5fBHqkkE7IA3ibmZEmFCdHFew&prev=RQ233ED9C80091CC) * SII Group Belgium * Sint-Niklaas * May 7 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... as brake systems, steering systems, hydraulics, pneumatics and suspension; Proposing and generating *design* ... or similar technical expertise; Strong knowledge of mechanical parts and computer-aided *design* Experience ... Qualification: You have a master's degree in Mechanical Engineering, Automotive- or Aviation/Aerospace *design* report probem [### Senior Digital *Design* Engineer](/clickout/8a6afab0fbd832f6?ql=q&sig=59870de17d14537d705605367c04376a33a92bcf&e=B2SgFR0dy3ATRszcxyE21PsXzXu1Xw4SAIhMWBKUmMwEuvhMATlu15eZRVSADzVHu6EX2i5f6rifrsi4gt0MGP9crmSHHanOdTsaGjqjOvbV5itCpFIT_QsG4zpySiofIkVNgmuYfGHa7ljC8DR5_O5aeCdnirkUVEZ23dpO9zf43In1tcbk_ILtvicE36pkGK-yxOBq2RyMn7EzoUPldjtyYobEsZSUipgADA-erWOqh0A3Kky2xpA-jpzt8o9U44ZN4sEUbxbIDkytCqUnGBmBhFLtGDlY8SJfPSVrrpQnZyVqSYNRrH-tnVvzyaQ27Z68pZHkEXvefCXkzgkqd4nd6d5M54Pit8uQEGD6rocbkKHcK-kcO8DxhGTzWqWMt83Qlicr9D2NvfV-DeGQdCPrtXA_pVbPghn2C5s7yBbRH9azOY6C_udvC50hrl4Q-wPPHaN9M2FDN4KGIPNhWXF5qzlJRcEx49wz-oILYydvBScK2hZQm4DLnMgQj-3FnFyNdk424aUp_2SYR8e9RMpFO3EQ0s41Ck23o8kOSurqWGuBN0NyYaMMaDCYKHiJcgWu-BxWJNvaKvFCNmg4CAPaXgXfv_716kwd26Ozc97T2AG-enu-LGc6FCBa-tu7O_aTNHIhHfZvyb_rfnWNMVs4Hzped_A_OJxSlSZqm_4J8m_2-drU0VkO13O4cJvKnZju-XAcQ3Ks-uJ4wWNAWnySgG7GCcejFsGTRfvqPVFbENj0jDQSE5T0aHrP0vZk6hOvcbhsNdL-akOuU063amQ3YUzspeAhW1OWpW2Jt1YCZlSEMAEU_Dw_-HATm7U2p_l0uynILfDOD34iSr2uEwpjsixvK_xfZdqhtrdElayZ2ZFA8ikIltwkO7KE5W1OHLZKOf1TPZkr1xQHDedwM2NH9bUf-ALKYYmb4JzQY2tODh8357VY5BHS_CPx9NuK0k1yo27PJ-wXD_cmuR3o2YpuWZdUSHe0raOBscehBMWH5JmS33ScbAmWbHdHi3aXcWcfjl3aZ_I94v5Hn_eDq9NkyyIQkgRbJT7H6gDcwz35n_Chy8Etrpao1paYQC7wNrzIENlpoGR49M7ghP2EmTn4lRTo0nm6Cu0mcJGdl49FV-Szexy5HJ894CZdC3AB17dEdNfFj9dbJzDCo_6Vwi011mY0SLQl_a5KzftmrBfKQ6olcJ0F44hFEmvkK4M4wLk4bFZ1uYpGnT5DD7Nvpz9y3sjCqRLwBPjx6FXO99Y1_Y4j-0RjX2UK-jk7_Zg4kTJKl_0fdoBC3BBKzGeKI7XmooquRkB9SFLUVICr59II-S9pG3JNOrVSole9ngctnpoMlWR3ROytDdTPbqq_knaas535Yz8w9mtKp_MGrfltko_QRmutgQZ6ZUPoN4v_VWfFqmWv8YyypDyxci2zTg&prev=RQ233ED9C80091CC) * ICsense * Aalst * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/f33e498c02112a20?ql=q&sig=161b074042b5ce7f99351d61e1dfbe328dde3f70&e=WdPy6PR_I0guAKExmCkWq8dOlbbGeJbXmkDix4V-9cyAo3X5DsMKf6KSjGisJpzIYUP8YnvHk9SGVUrxNN4za0wtyZ8BhCAOUDxBdetwI_rznyuhQ5fRnHnjs-OLBxuInTRjK_Jyn294ULgfHMRjh74HEAXhyzxN7-lKb99LJRWRVcXzv4Gey-4bB9BXmRH6FLQ2YQf4QET75cN-2gkdDIXInehxfC2bkirkBqNE7yoRo_nxrD3hP9hXBOoJEF4j706amz3bPTi8a0mEgT4_9iuD9hZUw9gK_1tJQFk7YLxVCeVSo7yYl4VP23t_rbL87yV11qRq3KCzkBHGDw8S55xpKZ7EeuNOtOpqF224U94cqRsxvlvHPsqXV0XfUoEGTUd3bm_GuLhDZz0kcb0xRFfDc3tZVIS5efjpKtgL9IptmBsRy30UrA_MIURichlUaT1qLjQGs0Ul-SeiWM4fMJYZ6-WFhIc79NmbpYKWfN4fSyiXSLev4VRkOYp3_OJVMdIz-InnxnJ_C-1BVpp6soX39gwXcyzVTno3ADyTXuB2-OnpuZjNe4tSIypauuzd36gL8HZed36TweLzFJvYWE8nvJk1PcXnilua33J-QYcvO8-5284yOMOVuE5uLNP0R2eVfs-U5oB4pkLDrMeYiqDqUqOUS9WIRKutAW17C1yw1HWwIWC_Xd279UBxNDUYYXLzFA2Rk1tz4O4s7V8YM9gvQcB79cYncbrqMgS_qSvfZOxMPP1pg52TmpF8bVZGLTr06Mgls1eZffVIJvhIo0gwpZQWwrDNLJXiogrAbAJHIJjyQnEChAlhj0eYzmg8jbs3TwkDx3KXGqg-4YpUK0INqsi-7T-ecW1WAVLy3Z8SO47aG8AOnP_FYc7AAAwv7cCFttj6DesdE5pluslnfh4uRmk9JUft8f7j4-Fq1NEwMkofsrmwRGMLV-FXDSrhu7mUKveXkYzKlSaEOOl2E-Qy73RwJ_A7xAVnWEgco5UabdWF7_hGshSS3MxV8clTATJYeBv0wHY-gDExRlalsUmsx4YSJ5YJChk2geAKqeNhn_bv_uUG9XWHr1aJBEYrWcgRrHN7RSXViVkfaIHSZ2AtxJRbuZ3waLA7D7Ihe__Oqcfq1YvdDmTVmxiwXlX4vTBkZlZufaJRYNkjm4lEQJsnsm0APQxJZwdTxGM60_dyyfbLGDWxuaSiRkfQeviInq70UuV4sGtah0e576W_Wc7F_qYgz78wossnD-kkddW8ISlGWpTY3p-TAFb6Dn1A0P5v1d_4DTxmVg6lz19o7z1jlNsDdB0OAGA2DdgRDWQRY5w3xDutV1twzXNKITOZm3QVgxgX1eikxT9JYrF4lmgrMGSDwEYaCw7LXx2VTutzP5ZLRr7uqDKOctw8cvBLneAUsoV9KRXTT4bOLzY2fc95jA&prev=RQ233ED9C80091CC) * ICsense * Mechelen * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/ded955a841a48699?ql=q&sig=b8b75721f347877ef2d78f676001a50fb8dedf57&e=D4fYoEZQJkd-PqVOtgUoAX0zRXCm_YXYS3AQD6GTjDtO1_H0WTTTd3lDkGeMCU711bzxJX1Ii8pLXJwObM3snlNh1e_-Q2hz6DawoNm8Qkrq8JqtyRctXRA4u93gzwnQKmHHK0BhYgknVN1de-r2KeIdwIKjIC2DKFGD9XGlxFkccuaifE2ldjsI6o7O9o4KjEduc-9Y5mRebDaMbnZUKsBv9RiascOhqkzH3wNbWoPkgzE29a4MxOLVDoF36FKea6dn-lOu50IbzG3_sp32S-XXMldnzBIFQZbQPLBWZARmwH9_M51sLT-9FErT5J-DGoelow35IdJGYTvO1U_AxyfluxirvA7mN3n65PRr1SpHSKoOv_0-cQBTJ02tW1fKgcErGL1CsoP7C42zd8gshi-5zHP3M33_rN5jn_CieXOIv4xjiKIHyqYOq09mzTK1WpytO5uejXCXQvA8_d7iWxCsIfRvdDbUcTkBvFNbq0HcDP41RJynp_ubl7DVGRDH7ezZ13ixXoUojunWuoU7o_2BgauZvY8Fm6AfK7T6sEBxqQj9gbFP6bibrdGPHg1CH8Trzf0_59ntQA68KVtRbbhsOil31uhiOGd3TcfBaIibD3TFNvVmfzro-QUi0XZ1UjTijOCMoYKuQmbEFUz2HIaeAmU2Hb1Ym85oBTQLo236zh6eR0Qd6Gfz-dCYNIfyZi0Bv8fFPJ3MvyUBaK73B5XgyNmkYvjldvoUnx8q0q79Ns-qSU-Obif4GLqGjngQC4MO_Iuf55tXK8NdyRGcf71Lel12uQSDu6OroRsAjeydiUchnbkq8uU2lslBYMnc_tNgkB6GkHnZq6EfmUoQ0d5FOFI4vkzxJSo4p4OToG9irsmi_DKBW7pbypGzA443bDf2zW7WdWa0kHKh6ATRZ2jbKdiBJThXoVRxGPWDgdVHrp1W16EFrXZ9A-U32dcU9a-omaN_RWH2oUG3RCyiq1CV0GnHKsScn9xai5lLUmWYTX2MTun7U78GC88Xnq6B2TlitkAUENA-zloaQ8ifNcayJdesTJHCqoRB5BWxYg9dUcjNn0jlf5nfEu8uSA4hLKovyfl_Eq4QjHxIWW86mT8Y99A2AUxPGAOa4oc-WECgYTGwTvFEJNg-ElghF_YAVE8iBG5Dz_vr4LUrxrkmbQX9INyX2fl8aqh_kzlAx8utesPk6Yfucu2lLj4nlNeEdVES6ptiThzXjOBkjU_IrMOmDgcaRMiAvXQwowxItDVZ47idQdaGMVWD9jYLSKpLdBdNkDdEArlFj9NEjbvVg1pKph7Bn3PjheUEIdaoauWu4F6RFMygTceeSJktUT8maLosDHppOJ1H_3EKQjcgHjDvhYyLAfZJgQJ46nwQMGrtvM1EZoQGXzHMk6aHv-n2QRvG0C5uY5F2zAwSBAf9S4OWpw&prev=RQ233ED9C80091CC) * ICsense * Kortrijk * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/d9baae616eeba473?ql=q&sig=d29d02d53c3930b5a244292e4074cb67022f7d42&e=v1Hwe2e9YDXu0R83D-Rvbr9fJ-vFpI-x0Xe_1YNDLPQY-eLtX3ya4q6FPEXtoHo11Ga5GT7oDtX1C1A70NZVgAdTRQzszfXREj6wb2nUnks85vHqvNkSKg4idsr62ilAkWDtRJA3qfXGtlxBRejRJdVt5kfXJ3RhzHdBmtVSrC0bvLweuUhZqblsxO9JxxWef9UNcTaFI--tbv6-tynEqxGi-D4h44u4RSpwTAhzNjvz-9-wyuKqQQZ_2fe9cXsDWXQaCiXhomsFszumZ8L_V7bzBFKLgqFi9TdD5gTsZ8UyzVLRy0d3V3IibdkKuBDbXUt_aGmWMC7GHcfI15pyCQcWTh4cEDe9JIPVqPm5kbFPu6goyHKoo0IDgaC55RLHsJS2R34Pt3Bz_OAfSFC0oMHxWrsZfNKH6SdFZxfTEa6sW9Yx2jbQ7IJWrLBlxYD9djsF6cbkGVMKApA7hb5YvTlJOJtalRBUrNyFVdGnHQPV4LBYrrAmO07ntGZHdmZr2bqrIR-F7UpRFMd9Bsj1Lkx6_2QsIFAru5s-X7tGH3tgK3pSdViYZqt6FxeGfiAedyUrn7N-nvPjS7Ve4EdPL65zKibib3VSg_It0cfylg8-VUof9aDLw_TXE6dRpGMgvaOn6KMbSlcvOPD2OCcdNeG0toVuipGsvEE5tB7r8uuggFwapBvpbRqQuTW5KgJQSffOYl8jYrA0T9RpDRfSZuqQxQ9V8rSDzswiDZqBM6EsmF4BF5wxfEVtvXq2s97b27maGxOH1IZ_wiCHqa11UkVI9tI7855iPo2yIdvDjjGJc70OMtPo1wWjgNO7uygGCTmbUivJRKuxTt9wd70XhUt7nsaTEFf-knOrmfburb6kg49IyvTEImkR6ZmCT4xD2mpVFwuYYFgnpHp7-15j5Z-biGcDKJ_sGaF4KSk2muwfKfGd7G8V-DbDbbxfI--aZM0iUeuepWzCq-T6LQ2pSfhSh9Q8zAPScdN1khgNmgM5hT4BNFewcuY1pOVJYSURz2NpRMEO5qIKBiuOWEUryw60zLc4p88gAkyRjS_khS1L4njMFYDnOGgZTj3_hcRAFXzHxAh8lTSKAugB-ScG_QPOOShNFnZ5LKyDZRfYcFI1-HIDnydNwaesXWUKOLSpSN2M0_pkZMlN6P3E7hwnYs3JjJa5TN9AujNevuv6ZJ_ztHkLtRDdD_tTMzcNY3a6CkA18ysHX3oW7Q1lVrfc_-U9_EBfoJtUbP-ihirJDqzkJ7bQbGJ-zAXRmFKpbSUve1yQ9WvKnThLruY6xoFyHT98Wtt9LhJWY-cjxrtRBDxYXsb94HsBsXppkeWN4HXceiH44kb7wO5o9RA8zquJoHgiqVE1yuHWmRYTvWfuM7ZwP3pi61hY6QemZ2meItgymMgX7AYeLNC-zw6gJlBvNPy-uQ&prev=RQ233ED9C80091CC) * ICsense * Brussels * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/e83d525e6989bb78?ql=q&sig=cae1947df4312be9dd8ac26a44539042f7219c5a&e=Rvswn-E2GqSviDx6Z_C6Md4Cdcuh7zgoYuTnqeq0eHQqXAYfsQ-qtuIqvxTMVfbeimTDFn7kTs6Hdm6h3SNkyZ01r87pgF-YWu5UVFBvUjyKW4lah6Q5OkTzuCLyiuFUFqXqoyfhLa5N3IMp3ZDrPPmeRhsyy7ye2TMeGhP5f-TGizAIwfMDu33aPpTFSr_GGe0C57BMyo1yzay5oQ5lKkCxMsKORcDcE32h5UWlquGGd7XJfgWNUqiH9Nl5U-T-1GOpdgmVzlO2HthuS_Fzp7sNSqlxjCu2WFb7_4PwiheYjJ-Bf172MH1XlSmAzfsv6JohoBbWjia4zjgVE6TWHrpaKq0XddmKHBqAsRTwuPKo8Z2NWKuPTwa9YsavvvL1mWymGpJRriZFLl8Am61z9cXhKuSPtzkRAH5iVFKxm-fNHdXZ3t95oKtZVvFl9Gu3LVMfHKRH_SB9vtFBjx2HJDKWWfCM7T2njZZHnJFVlmbW3CPkAx0NB62MW7iwDUpe_9oAR12vGIqz0rwvkHAYgcMrGejqm-CR5RX032-haPwzLQOX6bHyo4cNTYD-lzmORu-Uo9dTqRMVBXi2LVVMA9kPIbEEseqEGK5RwJpwS2rsdj9BUGx-NK82Rm0dR_INJX30GvbdeNej8XBPl0uAXCUaEfNRE4WP39p6Zlg_glyM8-CjNaA7IVfEwBqL77DYaeyoQQ76UL8LyWGbH8mxKyryBevh39VTCJ_0PPhl-uT9pOi6o4H42Msib0w8wkcjxVYJc_EdQOG3GNjGgsmhDasCt0IVLnf6np2RmpiEqVQKN6KNsSJ0u4Yh4xb5GJoA5BzY24N9qL5nT2LFLsb2p7BRaUEiTtUz6zLIj6xMjY6D6PiUBxegZNpaD_-lHOGoQohw0RsTlcYdmq8Ih6veU58dr8tspcgtg_LRk9fTCRwu9r1iNl5PBxVn6xKH5WBjnybCqgcXzoEXWtl7k8ohLTdjDQL0n04IAUNgGG7AAp2VQbwW6j01hR-gT4Rqv8S-AQJaWsuiNUr_mclRsT6pOKb946RsDKjESGnAw4in95pGpXyA51u0KTMJYqL-aNk9SReOELGdE3iuEInhK1NAFoHiIw8O_Pb136xGeFePMPI1Rgd9it4Hq_UeEZCm2YTiPr6Gazvc53H-8c87YZiLhMIxpnO6egCMyzo9XBvFE5YA-YV73KWptO4rb1fAX6uM9SHGJgbVfCuyCSnmlhZVJpLAk7zclKNldqrlOi5ELNE6dQOmzDbPj7xM2mCtNk8zSQmGufThNtFJp8wcp82Af4XcWiZ20ZVijKbwzz-23Mt6YLYOL2uCIBI-37bT4fAQ4hYSgX-Cy24pfNsRMpwZykJvO_UDpYctERq3dr8JzxFdRCvYky6Pi4aO_Z4vWpaAD4fOy2XhPGCEHIas_gMKJuB-asa_&prev=RQ233ED9C80091CC) * ICsense * Oudenaarde * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/efe1c6e5290bf1cd?ql=q&sig=1bbaafa4a520d2b8e0d6773021304929615d11b4&e=1bzRL0TQ83WvlqySD4kgY5yf97-bX0T7aXYiOLg4dMfWIL0l_AQ-IiqGaePAehPcyRD4Vcd43yS1Cckwq9zWIOWADskDc0pa5bLffBMJnnv9rv5qPurqVuSvjEuQeJzhwyM_ZcXiKDyIlfMQ7Uo-7KC_6fa5QhjJ7aj65yLKEMyHcZDuh5A8qFnu5dgX0F9kwBpUfdP2YPdOZPlOmx0UmiqN1ZlRnTAh89UJoPlr_7mxnxgf8ZLg3RKZc9gcsC2S63l19yoa5QMpsL_jnQu0sLMDCx1iDumDQ-LhzkvV8crCGW05PWI9yicEwZZMpN1s-z-R4vAz6kmYXMilE7O-Pf2OmRq7QpDylC8ol0-jTX9q46VO3T0AbNEE9kpSmAUVaA5MqdRGLfB0CLVbBTJ49L6EUddgPPAXqNk56GQ2wl7H6dDNFDGS9YETXY_yScaj7r7xAyM6Fv8bAW3tCKkB6NIj7lHhAB1zPPpb7ZFqJhmMixl12Z7CoBB3V6qumIIOJpgm7a0tj_feDy1LeXD9vucXPvqfTGft2se6escK7cfEbyXFsp-NpACma_LfYtOUt9eWkQQnyNKs0m9zFl8UrLpLIWDGnUK9IMCs8Nys6Nejzvlb4aD7HyCKtL_6K3MmSuESpjBu-UKLlgRpNyjEdABTwfrql44BLU2bmbmB0RUYNM5G22D9MC85T7WNx6m_EOrxXlC-poHPlSVxbLThtwMTozSOE9E5O_HOPHlD9XiZRgnIH6_P6BY5OhJXyxDtB2hIejlV59UzTe-hKm7-EjH77V87D5Cit_fbKAEJdEslvQNvmDjNCAUKh8tjzaes8CfQWlk04fsyLBvdpdFC_0NEgIH0ejAXVejoANngnHG9hK8cCQlwrms7HFRDv9uG1MRxFdqUNEKDNm8ahbfyfasa5VWa5wMRYWW5RZ3qNXFwelg1IRickZFIxe6fQBZ2pnKPZv_MjxjTNFt9aOn8cnRsG2GEJmemQZ-2-Kix_8eijKl5dDTvRTU-6qYOSp-oLwzKX5Xzp-E9pODclqOj4ha_xvqmUqa01UOzfomTwgS3LSAyCNdJWLwZEUg-FbgFkkC8n1nvFj7XzF3ijfQA8Pu6DbmNgCYGuFO1F97BwpZ_cxBrbDSpwfExgv-L2X_blMXnOq8GK5lb8QxGq6raqr_JYMSMrabdT7JiAgCWJqqQENCPnhdFiOGqjy9ZOW4GRz3rqvxbFkCnr6oo5RIvjmm0luscwlma8_er_KDs1XXh1XivUWTYhybNgNWxJPv_H5d_TufdbFXyc8cX83ElfahmeT80xkLDQdZ0tzUQ1Ho2ghsMMHRie6bUR2qhZx06MpA21Cub-Qq1CizadtJpEZu-IPhUGwa7Uc_kPAj6u5KmbyGF9YPl0kaqr0OYndSlXwK7Qgp7Po9B6khq3BLAxQ&prev=RQ233ED9C80091CC) * ICsense * Ieper * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/53524fa981196fcb?ql=q&sig=c18c4782c3be4933106318bdbcd302fef949fb7d&e=ChjP68ADUEFY5K5zdhUSEMu9eGoD5-wbRU255Mmw-jNdCrFNjewyB6hLRXP2mRsncBGgGDl3tMeAwdBDEHKN_f_kIRMHJ0w6agdzEnjYpN1pXwP3MbIOkQvm6pGTWuaQfl9q9CQSyNOD1mnl39SMH35cvPMXVvRdd5zzaW5_K7PPxauLsV7-68FIhDumETmF6p7X6ASR8J_aNjZmXBV57vHzIXwj8PU2vwcNZktglz2zbv_4HFFsZXXLINjwykaBZpmJnuPR8l-jO4kC1TydAeITtpebA2G3H75hhWT9OEaY2OsmOickPSkSRxA6PCBQoI133UdVD4oxjp9SmYIoV_uYzqVzoJDe--B1U8Gl0oztBqPn-HUDcaE971BbPckp3fSBP1aQ8z-DXXJBcN9XciAARq3CL2YTITs_y7EjLl5t_mlqiSNSmKDPGgGxB5EycRw8KydRSnMtPtBvgupprZiPv2yX_QBlQdtLC1WD2KEMOV7u9NiSb2QKr707OL-uBvgIj4vXWtWvOVYOCT5Tw5Mo3GqK89ey2kvj2p3djljZXx5DxiRmceLg00xSvqVzoSS26XYHZgcE9pDEkyXjoYb8TwzBPwB43JJb8MQbWe7-cd5Y9uP0OwXua2gqE4JVkdTJ_fHxo2Wwjr57ZgyJck5NppiQjW4z4dw1EpxqDOkM_gLCX1L4uEq-ijj4JQb83KEhkwwbGaqyKRlukdwUToQK1Z-kK0VD89SUQs6dNCNozECi8loarfHjJC7OlxZ7V1lK0ThODpmenrftSgYwTbrOWmAaZVQkythwBhjvewM1NNofJwrd3JZ9NYCtN8XfRY36peOfJLpBZHPW4r7caVRqUa0NjUkMkRhFzmVDwy3iTHXcjcJo3fPfD1Oc1WNH4XOhcdj-sWkOGORsEtEEsmOQ6UC8wCIpj9dFqHrwo-IiUrJzYu7r7BJRSm_rsQ-vAx0bASULMFJQ68Q9VU018K9PGLnpMz2dp-j2cq8xVvkdTEcZ3jh67isuh2tfMTflThuaZ_KhUbX-BHbqadRnDJuV61ap_3Q4lfriTeQB5IY4EfgCOBkD4TqV1c_w_tURk-mnP7gBPS6O5SssGdZhfYlAcVDKT_0W033q8QRkAZnYzI2hHtfmlfGEzrAOsoex6jVThcUneFVWAEEK3bVfSvDZgLEgfCJWhmKlZtQFyg_DSimOnM0bS8MXp8oABpqQM2_dx0sTpGHjdHL-um59XqBgAYj-etTfwkbhSOWLbJ36PBMfYh66FXC0tKZVxFYytQ3hVRid04lVEU79VxeHzR6tSuM5UivnvP_XdMDwhSWq6_0B65uMxnPhVE4tEmdwgYZOAXrUuBYEXeSxQZSosRCZ-eFPf1cPLkccauWrinX1vXUIa_dCb9QappK6Me2AWU_bxsLAgvLlVqZE1kGcqvg&prev=RQ233ED9C80091CC) * ICsense * Ostend * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/ab31e4df5a8d84d4?ql=q&sig=583befde9402fbb52769d21e2bf91aad279e576b&e=5ANs53eiPAq7VMbHF1jR2dquzszsSeEt9qs7AVIcLVnLBQRAD2HSOC1WgWk4gZnlcGwbHU2idkxYrZfp_p1YqmQqFUzHZtXtJ-rvySJ96_Fv53mj-3WlPT90dndiZj5DHecTmT7S-7ReTlmahVmTkDEm5ffusuRuzwEx4huVK_MEbrTAw03Bl9qHoSiJwHg7zlOnq64ea4_sA1c7CfSCl7JjsWHHuNZiKFrRIMKYULtynSQTV6zeyPU-47OdY_Dc29GyBXl0DL1fgKhS2X388deigfUxo-COGS-8t5XdAzvL1I3mWskOYhARbsTMKPIRgQd3CpJSNDxpiUDlWnoQXaj4Gf34EkNd9dOLrMdlTlRT6JwMGkEACHTWUNuh0iBT5dIk9ZVR55wH5GRwgO8as94vtz0N8oYH85fZ-0SjWNQnA9metUUkOsoAiTVFxVfrlh3V91ZIdvKAz3Grcv3N-xV2r7fy0hLeNwvCoiXD72iurJRk89W_db0XFjph9vG3qon9tX5F0m7lUpKwSqldEKc1GYa5bJY2aIuhRb4Ihjw75X8TA4Lt2bjXtpJKlrn_i0QgWEucgKQ0ojKF6Wkib1xoVTYizx9vw7lyDdPWRLpbXT1i6K_NK7yb-N-hGbdHYQGwNB6kZDmwIHmC1V8jtnib2066MnWMntNSDL1ASXJxY1g3LG8F6IKxEivKHHHXKzk6_jysz0wDp_DlwoDqcl9pm2nrDtdEWzKVP-iakC4v4kvBndxlhCV_Nn_XaiO_Rr2nDCvQva1f4b6sZJtA5iyDA9hIQqhtRE2l-pU92KmI8nVZarM3v0Z5mNkZsi1jwsZdAYGywr59vxs1GnvIECyqo9dqbkEIzcC2PiXdC9SLHp5WZOe3nqVjbOQKfhWI430amY0QdqgGrt8sXNKJMOLrWKFVwWCATKiOgYXTiUBHuKvS9cCiJ-SI7tFok8mXgsuQKgR-GDbLcYQvUN8n_yAa8tlH8-yfWowjj2VH2zXH3QQ7pHfS15qRzwFGhTPcqpVNPMj4MikVvnbA-iEHwV_6gTNGkMpjb1rnIwRRoMQ9-fFIib0Sqxhj7Y7aJQzVOVOMA_CF9h4hLLgJrUISpinBn5vCVceQGCVili_svz-yyWCxq-e_tvXnRcpvJJtG_2K2vzqDMxZValmI2ON5o7wAVJwiqgD2gDr8FmqE7SPNv7SdjJPreyilrmBP6AIPJFIjEhxC6pF2ieZ9XUhSpccwHjhFIhTIfll1f1PQ27kRyeD4qvIA2Q0j12lnShK1ya7-OaKqOL2TRCd28MflYEegw44GQI5zEaQVB3j2h_CJw6xeQNiP6AsXj_pP08K2RQ49bijL0XGnFnH8sNOxSjnuQ160buZ0m6W_2fht7yU5nB4wIy8wkj5xPRx2Vwvx7VB4QUCvI22nGY4HqmMYpg&prev=RQ233ED9C80091CC) * ICsense * Arlon * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/092a3f7709fb3ba6?ql=q&sig=73b986cf47316b593bdc6c05b22a72b2db3b09ed&e=RLBvl9aF6zZsGkh5OBfIIgyo4f7liBYfrqN_0SqeU0dhX2Ab2LkGbJpNVbORlPJiTIHukb35vSDKTfnJdn9bIGlNE5A1pA-qp1eBsJZkVad2nVzd6vSfIIGcvbXv-jRIeCMwnSvOY3aXpEBWcBirz3EsYNgLzfrVTjYqPs95BufE_imfuzBmhyMamsNDeja9ZVRkZd4rkadmO-rjIhKe-R_Bmqn-GEkRPeveS0XzTudabCllAj57GW6hFj38qn1Uth0Qb_GMgy3Hf-he8AI4wBAiFBn1i-TMrLjS6JcrYyvg1h_eWXKOPBN6J_lzPUeOZuDraC9U9Y0VW8dfhWQbt26b5S1YRaUChtyTskPw-SLKMh7B5J4GlNDptYL5WNrsleAfx8L5BiklXNd9_KKi2ctt14hWplaXbjNIztKPx9bGCJqPOiu2mfMsFpxipC7pKmOzjUEViJ0egNJyPPFwKzq4lHCL-1jfH_UERg-8lulKzVzKLfElWfVHjoZppiAaxhQdD1yBMlLuRfZekLzl7_tQRWYGQ81-gZs698uHk69r1J-9OZKBclwsQaVl31jF8iAg1-40Qv5IyhVH_hbhOOJ3F0IXV3LE31b7VpBkHq1YPip_zJqgZxG3t_co35sk13YU_nr6UaXDZSLIRAZqvEimwWtS_FQp7dVTNCiPdWm930CCYyhV9wc7sUPlJvifKP0Iz7SXjVbW7LEt6hwhODkBP5RW0WRjOMb5pwu15x4tnNjyK8m8iW10KNb4yJwx6ffiBVBXmD6_YwVazM6uFy6xYyEM9jRuzS1KaGw2m0CqNOv3ebaUVTVobQvhQ-bydo_mAlL0X5O4t-ya4a8spBqHuNTrdKuh_zMKRHK5rn2ZTb6x_eArHVcP004oeIYVQ8bN-TAvPOp4NPQYv2LSoloWqj309eOvnYPVuY8eTRk9iGblnRKpgz6TaLw5KmycsbyiS984OdYsYKwUckFwl3qpFliCI9UFL0AuWzP-Tv7p6V-4Wu1h5aZRrdRGrIFYXTl_1EDt7ho5y_M0FCUNuucIMXWw-XfGpe89nowVsVy78I_X3zDeq5IchhhRI2kvBpMCMLrZ1H1H8kfZpqH0furikPg4KkM5C37hAvDksXEzLNa1jhxa46PAp31GjYoDLD3CtDQubAgdI4_d4hwxRZ13rzHpblPDFWv64M3znSUz2G8vZT8t5bfrpuf81b6LEv-31RJwGOPTe0zP2d-LyYKnwShlBSXbvxsNkqBnm0k8Geg2muuabgoG-Kz5Lp73LTexJTKqqlSia9Kdbwsqr5_6ynyowwNmxsMm_RHJ6BYP3mUUT1NAZTE_nwvm-fekUtofd4I0cfoHjfGh52_O-cerm8GDinsZdiaUU1QNiqcPlbkJ__8lP-Ptur9Z97FxQAhLZqcMtezD1eJO_-pK6GEv&prev=RQ233ED9C80091CC) * ICsense * Tournai * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/4c20ec72ac1ba7be?ql=q&sig=d7e17e363f7ea4313ddfc4609f39742f0a30086c&e=Ddbyo8IxYVdeuV4-wCfCaZIqEbvqDWzZboxSE1Sq5poMaI329kSHc5_goeWulxLOr4ncFJVB9aMQ3TVLGcpNfk95Xkz2F31FxBLmH_pMdUtHyQGVwEaCLAjphet-9xtVFB72hJcjx0XVSepyMVHp0B9oC9kBx4_mSXA6DNPWjk_YEpb69NqPpDUNutMbytQHOXb-Q-lVkMKbJP_KXfk7R0io6RsUzWTY05MOrr77-f01e-qLL66eI2BFkV_zB_q2i3wxXX3cc61G7RwWl0w7FHG_iuMvxt5_I2Ts9A_ESKHVT_7RHPpTFwjTQNj3s3je_R4UunfJI58Y5M59Fl7DLBzrB_BpqyMrRNn1FaC9fzzZQCCusarCreChLQnoE2Udrwx_xRr3A2B3ku6UBagWD_D6X9bNM10kVUACREEfK8cfkmWSA5MmZTFj0j45oIxEpdNKXhcL3DpzUoCueD0jWawM4tEx4USDlHolcYP9RW4l-Ctby0eViXnCfV9PC0X8xaYSm5_Nh0ej3u3SeT-qxYG08kKM1K97JtSc7IQKD-DSHaH7N46dVVQMt8YMkOYNQYZlpnHkhhzobtjBiH45mBsYBwtta0B1ZB8wka-2cLEd461bnjkEScN21aPC15H5kiyWMWPqtuMPhNZ-cXIdyPwwJLr3LPVuijxGu26M79S97YRqrsg_d1ctg3yq3VdfKzkF_ucAdLaStY4U4f_VDp8bjLHXBghX_X5fv1u8SYJBhBgLzWFF696pA2pBD0fO9k2QenJVMefik4NiGJxuZdRpI9-K3n2TZjuPtdRwNWsk6jZNRSo_7VK82k0fW4ESkYLJxaZ0ryJ4gHCybP0aBgfTY-zsLJUf-uFstwwqolq0oG4x2uxOvOOI0lCY0YqoEYiXI_SGpGF2duff7txVtbSTbqgGS7Y9ZlAODlUD-V05qL4RXVGO1cSxpz8WhWDa3CReGv0aVld42sFyqJdxjB9gcHch16t_hKmtfUTjo0cnvBc3wiWrCX81zC2J518rYTF1lStLod7C4eaMlrfH-LMMbj-UPNYCnSkVtTlgviBCeWS9ZV-mMz7RqQrZHHKNW_SorR-PLtTYH_-Tfda_EIPh9icGtKc_J6ygneXltDukvzLWMQEwTd4F4IJJkNpuX8R24mRu_D-7K5s87vq2NyDcZ35JvX7Z4U7XJT6rPJFfb1Am5zOr-jbyhxuWv_fiDdiDFnpqnqQilY547BUubN_AZ1X49Ah-7qKDzSf_BH8KEcZxZIiJSSqaQAKkergcsa8_XQYKo7Yhv29Q6NqeacjOpqEYJhrqeEMOUCI-gtveTNj6Bij8HKjnUaX2eFo2k9wSrXo3ZaY59XVkv0UCjjn5WrJQuZGVFtCzo0UpmUx6qBZrQ93A1T38sCyclIjkpxClMkUJdpF7NJrtSVZb&prev=RQ233ED9C80091CC) * ICsense * Namur * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/de751b3474a543a3?ql=q&sig=90625d72ebc9d34f33361cdc288e254fea7470ff&e=dEEv2sUTwP58_Bqm71ATp-_geAvzh4MLGOeCMUX7M3OdfYm8cobzaYbWg5dWX4jeaD3JpbgwNwnbsBPKSijnIBDLC_ZvwZPYikgHajM6h-VBmg8Yi5tOzT6QPmSM6N6g_fxHiAuVFsIzsQQFlUV7dxWDP_yQC7aBzEHfrJ7-j4cFv4N8ovYVyOBJISLpI0OgeHlrh9a6Ucs6l_KH5qunkmtDea7k5LLajYn_cOQ2-r-kHkuZBG_G5cDrNrER98L5jjq7auKzJERVWmwtkzBB5dnARNhRWmzBR_E5FiJHGZee_GnrO6QsqYi5r2Dn9Pg1JxQsBqZuuXI-MFqsf_zuI35_giMAM70l8mCEU9-6hnUn75o1wN0WszB6PNgx3OJGHtCIM32ZkJm_dDKZROcAJLRu70Bf7I1qnxBP0QCH2eMUbNU3QMAz-_dwcHTsTXkAPSo2JME2Phh8-PAMGwyYjlAdGvHWCi0wgX_Bo0qTdsWJOlKGWYN9tikHvkZkZ9lJTWtu7r2GzmmTdbkk4QZxwgFIvsfo4yS7CIEIey1vWsOjrcWZIBUBh1TQIL0RNZTVcSrxfYkuQ3ITY2ku0vtzfHq8ZO-FQaDx0DUQDnwqd2GCipnnmVsjj3gWaxdXMpsMtAPzy6XEiNmi-iMK1BOW65TvXBlYoYefKzQYjmDn-dv4k4_94ekzx4QKoeNwvxxceu8gDua0KLA6HNdpDMbM8qyu5OTUFSnt0XfZzfBWnxfv5FU7Y_GaJN2soOkzMg0xcXwJYQbOyak75zal83cTAA8oBFcBlv1glQ9pRvLmklUI5zPp8VBUiTVkQLBlpHdNKfWSiVVehICj9p3nf5W8hZBOnlibo6xUZu1-GXs3rcGrTGecH1GnU_jZ1wvKXE6x_46oX9EHSvnOf4aD1A7SzcRwdqZ6FBKepLkpNtKQgy1MQo9hHDz6w0bBV6N1MGtBLl3cDmHgqUoGWHroqF3rh7RF4IGPGnTTx_ol2hQpYP7Yy7-tWJPNL_hdNkhJ2xR5qwtGJbfE3Gi394zMO4IiDOvh9KLeiK2-5f5u6oIf45P_Bi10LOCDT4bxHrnFHzS49SDoS6QxW9zES3InA9Xo2TWK4TCcS8jht2ux5PdMX17aJ3iBIwxk97UjoOTh9FxkTAbkPdR13IOebNblgppaG_6NLLfYaTjLi9nkE4Iz1GhvDoj6fPlbFw5Lr77ycU2XU5lbP0ARcGmtvMASssFtwpftrxTsE9zwSo6Cf4gyPGjYWrlzyF0PuJ_-Z7coAnqbLQ1dj0lJBoKqH21FE6KBnpzMl71bO2Tcv7jA_uxisO2Jr1Q2KNcntvs1LpieYwotW7eRVNUeFCiMC4JYf9_uu_MGuWRqqIJE4cho65KQ6iClAlTv8ZMvt1AD4AKwlwOuCPLtZFX9G-A7VwgJ1Tz0xCBGd3o&prev=RQ233ED9C80091CC) * ICsense * Charleroi * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/0408996c660bed43?ql=q&sig=a711d2ee1b0e403066c8cbae22037627c7c9219c&e=tPbsHijv0zR-WjPBgihsAxTYCyLUiQWhZUQc3dc2PH0BpKdnvx2WET2thPA1woJMd05mcMJ0XCuzeiqRfhAsf_y3vHIaMMYM67beeYMIzszm0C23GjbZYR67OqVmn4xKkAG_17-hZe8_zcwikoAIgTpsTM8N0MOGZE5IDzciV3cYUWnCq9kY8EBJh8QXvOI23ZDVgy-us8OMiG4vTPrOt-L9zuCtFvaWzfrNnV6KnXNWfI68FchMg2vjmyu8dET6glv753WvPZAVjoya4QFlQ1aCeU7I8XZIHzT41M73u99dOIjnxalv4wy8WiY8vmFsKt1LrJPMack-ELTVLz7uFlbyWi2xKXWORYvODIBELEM-2Mwt2F0_TRBK5Gcog5Cc6qIKkykjeP0wPVDqU9SxbMgZ2-rOtWzQHWymXTQqlSpekbqL7QxeYcvTk7OitzKgnQNzHGsz_KFzL-xHl4LeWiNtupH_rnHQ7EBzegxNUS3okxHDLKgLP8ZX5CSDrSO34GN4kE_0HHpSDru1ODVP2Qe8dDogHLSToexINkxCJjnhf7oUKuBUYV2qVNsGnkZPaad0s7JwTLA1eVUROqamACIfR77eHjtiT9N2Xlm3WsF-cKJa0NwEVt2nMlva-ZOcqGQOsllw2AtRvNy5dMh0VMYxfh2mQUb9FtVP7hz2xgkmAz5pOzktSeRGRWkDq57LNYmuKrUxIvjpa5ymAzxP4wqBXK3hII3AbENHYmGCdwF_eNfaIWGT9ARNkErYjsecL2co6E4uCrlgtuiCif77-EvDrtNJpPxmdtU2yoHCCPhAIj9orhN3YnoKjua8j0cWdD0iSlOoU8LMVrvTSg_w2byKfjTptu1P_PY-3OPGPXWxyPIwXQdRON7SIF47r4qSZ3cHaIztUy35FFLI3X1hp3CIdO7eXQ_nrKxNZ5lKqKG_O_hK1vCjb2Xj-5MYBcbcsQu2h7BYfgoldRBzBrYS8Vlxk2agqnJGc-BmuWJL8hkxmz-GmfuKn4u_pA2BHqhdtxl11Ngdtdie8jVCxnrWtEbTYpAPtkY2i3x_xGsjIVdhUOKPTZPcBv9YVaZCwTr6HOWr4V4pKD1_b7-YA2XbrrmZO8ZQOU21zZETUNuybOz6StYh6dRKA2hyTAoszPXjC2lDW-_-NP-q91-1Kvl3aqNq604sKXYkVDr0IMjVqajxTMbLCBmm5cpQXXvfqXBz5NdYql7bsnkgKBuKxnKFFtVcUyRKXHlNY_QyxQkSWnZNuIOexNyViNlDuDx7slPFqhSh4jk_L-GbOSG-4OGiEcfwm0JDYXMfHgia7id_HLUsuScNQ2J60atzdLdCSijbDmcryH17i51QswzZRSVUrMVJYV09hP-_KL0apMeOlqyArtDUChcIvyghRGpz-ZEMTwiFWsyUJwJeO6ElZu38-wBKTbQ&prev=RQ233ED9C80091CC) * ICsense * Roeselare * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/ec1edebcef94f3cf?ql=q&sig=6d9f149baeb2ddc2baca1c48b045f39dbb268868&e=OBQHYjVwd334emn1CEJ9viOSN76GMwyos8MlkYN7M0wUJfOe_OeomD55vPbaoa8MTU3CnqzQQPkr1AlBaWWkle89U2qSxFcsbwdW7B7PURiz7rNz7JCWTkZBs7SWMz0HqEiwRTjChwv2py23kx1BQu5hEJLw7kwCEvyomYTryTEm7LkOBUpTc96e-p-eBlN-TxyOD4gL5n1dOOblcOtBNdw2I270GtAN2aC2P8Wbj8f7S0m_nZV2fFz1-yVxOBywzvwpxqiWPXfri2KjklA195nILGKn_sDpyGncvm03cpE5GfQMqyJQDVa3L1T3u0b9fncDjKsacigM_SF6uH_HmM49O_LKP3u3NhxeeDe3zbeGIvGXRUcdTWOK_o1r9Bb8uxfyg42S-2QJsJjK8BVK-Cx53boFWglyyhe9wGScfj4Q4KWrSwqKQ3tVdsErs8iEM9UeqAbvrzrBV2U9yPMuO37RF9_vtkszc9ILncKSKGtQ_1cfFXvm30rOSp3MCDdYSN_XV_CFpJxghYdYYNRYwJPeyuZJrvy-IBcNHhAlx-MKWaH-lSysLSRdpFP8rA7XZYt447Fw5CpFvJrp4PbWLwdx4uhVr6OSO_k-VsBqNEcGEZM4RHeW0aDoaEEeZHnMVdUa86gJMzd5nI9f1c2GFMPqS0lGg2aRsh3hJJB8cgB7sGuaOaeOy7qknYCPkiCrHmnhxsqU5uoUOGxVvgKUlL_84qKJdkuR4_stggFFrWrVTNWCUV3rzjdJH6rjModyMClzF9nkolv3CeV_lXIiqgSxs1xk4GrQDe0zeN2cOAy1ARs8jlIzj3S2SD8DJRee51A71qJLhFOicGZkizlE9noYdYF4PSeHgUB0Tfc1p1TMKEE-n4oE01xhdwJ3yVVySZgTKD0Q4sKleVXv1sxbC9WY0zJ6Ozlg4AGr0kg8JKGxJ54dqiRu_B3mn0DDi6d5d8XD2qfNpotRJbAZ6yCIn4H1xc55qP7Q8yDvmmRgDo7lS_-GkUMC1e7jzgZJDyh2IKueCg5phHd6bQMvdsFwukswJWG1HH5SLvHjJY2r1UozIQv0ZQr7WP-HqikhCI3JxC11jX2XFzkZPZEuTuu30tU2YgC3_P4Y2UJ629N6gGndGR9TT9RHyJRjbQhMHFe1BRGvBplCEDUQjsg2afi2rpmn1F331vNnjED7JqLmL4dbQKHXuuXO-3dcyMMevo1cOuRetR0i_kDEvO45hx8aqUh7LAQEvsXOP7ywh3crZEYwevOhr7Wvo4vu_SlUNV6Jxh7ZbJU4Nli7b-uBos7vps1np_P0_1yYPFX3F2q79r_UMdYrH1qWBLhlwYpoGEFVYB48NkYvbEQT88Nm5liQT2sAY2PaTQC1YyGFJZabS4TgqYaezv-gVxA1PJczGdJRM-ZTOhUWP09IiyzVYGob&prev=RQ233ED9C80091CC) * ICsense * Mons * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/64ccada13aa2fcb4?ql=q&sig=f6247b993dc0b351fa67a5d1fac7d2a5260c203e&e=FWOcVyn4cMyev9dFtXYnjLfJE57EDwpxqhjiLHYSXVeQ8W_A32NE_e2n9apI4a874VRP5UAj46YmYsqwHqcNlLtk4tez6KQpwhAofHTZAin-2vwAR-NGHIY5VH3PyMhn-CdN5o6yvM_7OeW9vqp4gXDcMOhqIN6XBm9nuXbn4bNpGTem8yrEpXEqR-eE661lDVrou7S87ki7jRMe7qxqIkwV9QXbOW7QWCifDtlrYojfjnPWv96tmR9aNpncuEqkWFUoks7G7v3thSJTRMFTjwJn63cFFIe6aSYcLtcMvTQhy98dKwDFRWDZhwJIYJa9xh5bVFtYlsecN-Z5vSeUwRhUvz6jf8sMNn08crDChkjNOGEgjhmRTR3SKETz5I-8WpdcbJCaQm40i5mizXgZaYMZAaQRUUMc_tRHpkSQVuI3MnkNVgzds2YS2cBVI_wVogae5eZCSpgirJThACNQ_zA9C6bA7lJ7LHQQ7agmXhc1Iw8TlgYo-pOnxfkEplrv8XRnTs2GFpOzKHAtN8wr2CEwbaLSgqwilvlmOOLCLrwaXwzYyINTym6Wk3ejhzZY_RLblXkN0i-afaSDtGykyfIbpnd3rChjrmA1P3aZM-S-_hdXVk90zobqpk6in4AMfSb80IEJrjdE2IM2Jt-WMjxT-DRHXERh4MA2im3lGFRGZ-xVDiJJ0-G9UjtAW_BM_wKyS-EIDHxC6XPxduhUKKkyhOE8bL_-aKHVuBdT1fG7JUp1msSpgUTNofF1_xF4hRFNi4udHfAjAnIsYf_R5mF8p2RQYMQKjdS0uT5UeFf1iMb0DVgaT_jizyGQCvwSO91sQbfVj52aXhvyOJ8WAtdB62SGzmrGdPYgy4jggIBV4WQw-GbglVq_cJiZ_aeXNPG9RIcDrEU_tMiDouqyFgJ8l4tKYFJSls1FB89nIefoD3hZ-mvQyW4CSsY_duyseCyVbM0icqiwNedkJbqLpMZWGRJQ0Xs-PwB1URSME7TBtl1_1UMxWJGo0HHgctA9Qtj2pstRGfcauTxI59XmR_--rJkiE1Q7JAEnzuv5-SIFaIWcmOEoaZKTjYJlq1EQJAISF7IoYnAVUp83TBP9LeYzdrDSD7QySDWcEf9cUgZz8xX90JoNwdNuCLQBiNdzKri6BhLQ0ymqgZtbidXFqvzWqLu5UdY6b3LK2VDGjbEJcvDDPUdXJs3dWhBV2H0GfJjctn-lu_v94aNhVAaqos0kK9H81GzWTkwEu_hlRztZw48TdvVGEJzQSgxryDr6HHs4tB4FTpv5SCmegn4kI4Au3ZYZ1PNKttS9dlVP3-EUUJlQZ_vBfPwxLZI5Ebypj9mI45zbR-Q0TjFilil48vJqR1MkMfCFmD0nIoF_z7bCGGAz5cVvcIGrd2TVD3oQHA7QRu5qmwvj21nBlE2IOYo&prev=RQ233ED9C80091CC) * ICsense * Veurne * May 7 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/f9e7a2477d26e24c?ql=q&sig=aa3e101d25e53e2097d09543c1469f6c8261d0b5&e=pibq5pU_aOem6VMgph57j0o-NwavRGg1_aVa4417X3pxH7TXMG7z7-VszhLHpQFbghwxaSXA5lM1a7nDX_yCdqTJUr2ktvGkCccBLwDKjVazKUt6N113GjjdmShidObwMZXL7sFzWfbY9jYffc-RrKnpupbCRTu_riFWXfeIIANvdwA65IXI1WbUbu_PMoUNEcBZU2FN9rfgNHWbvJuPIK8n19JMq3nZs9I24p22_0bpRf3jEcx39k65wXql3nJfG9DPCR1gjsKS1GBZamG-HQMOrmfvOtBhB7D5YQVMCqJd1Qr4AjHF_sOd91rp7SkcVH0zTTFOtij9huZphVYo-5PH5ZQg2QPApCJhMs7xww_C0obbbdAF1Bn8PdFiRvCGW9CMX703M4WoA--Y5I0Q6PtZK0PYbBBCd6ZZe9tNf8NIj_UXRMyteIE4WPXODiT95uLoxTLWqFQ-JfJ3VibVEno-9Xc5ToXlMfFo9Zgq5yxgtM82Fh--7BwsgZokj23Tx8qg_ne76oS2eCw-G212peXY9ZECaSc0DNY1PfvqCiW9JHsDNHmNGudE1Arg54RCd8v0P8dUrtvHtXloZPOqI9dzxQv7YgXtHNjRKLLDKZXBHw-6wABPqEr2vh-o9EY-ZpD63h0WYyqiXwBZXvXWk6-69Fo1gmCOPItUtcoLucqfWE684khOYDByuNyzPhtE6jkM-DBvrGkiMKZgxDiW0Kxv829bjZ5s6y1FqHogmTSfqR_R15f-UkDW9SV953yUZQLh_QIekPaXy6OJGlLx0hxcfRXkmqSH7d4dfdecYbTPmXClIBwXbgRS-76NulAybcYz-ZD8hxxnCgHFCbnYOYqfL1MYc19uhS0dUnazk0UkKk7CrAIHfnQeq9r3F_AT67RJPGovcibYpRWbYoYKtu9gCimj4jS93smJTObXyJodWK5jCBRcdLnnK-BSnXbAxhnPRs1NViv2uxlCeLcg11IGeoQwj7aM5_uNxxsqKXbtVtRIFgZyBdO0-HVSP8FIQ_hM0AHMLLGo9x_smCQQLjOP1459gHTWfPEY0Lb5IsBMV_6CEipar68Wopc1L-edrSz4cY2caQKcN7l0z9PcG1Llx6CbZN0uHVP1Cw7ozCECOQkB27yAWvlqtPjCSjcUTCq847klrcgJKqAsXY2qlxXMKicqBd9-j9f5HXUbrmCwHrJ1l64Sl8eOfwviXjldXJ0KbHvkEPVzVIM1uZ5uOqs2axSG0tPknl15WNpF4J8LXjjrfoZdKGNn94qzWV-1oXZtuyqhH6d27Xv_YuvkvQ_nJKyadx49tRHmpNgV_uURtXH-cp73Es9C_eFXgebwAULJToItw4TKRFa3GGRC_3V2zMHZelElIco1HOw_hPf6ky0phbQPA3CtT_7WyyC_iUZMEiiCc5OA6g9-qGS2Ew&prev=RQ233ED9C80091CC) * ICsense * Ghent * May 6 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/ec08e4cd065a3a28?ql=q&sig=2f5a8ba10f758a5481c7d15a967c933e30f257c3&e=m__P6EjEb-Wall6kpOxvBxiSK_72M5BFSFjnFcGVqicYsAZLfZto2ivyoQuCWohaL_7jqHRTtMPfHKurjl1FdXuJm_BzekS7AJlWk5FftatOiWj-sKofKJC0yE2kkW5MRsTXGR1oseA1HxuT5ei4dR_PFo39kbc9zIS6qAaXvFDEf4lV3AguLUepS4KuFnIrjs8G2h91jmFaX-1i_k6U0CS7ljZJ9uJTls2dWzYfgzw2QKc18nfTtcO9-CxP8lP4t0YR4RkJSrkBun6DKjMSil_L1WekCbRkHggeX--Ugyi8Fi8al1csrLJVNM1OTioQvAR_9MdslbibdN8Hl-6DBbXfmJzSVLYn9YusQLY6GlsjOUpSMyc2uQ5RiXXUysmPAGBhM3cX_xL_NiwYnTa9Gkp0847Go-jsdCDMnyjUdppdI7lp3hKmrvPuQCDvCtwwf3iQVevMHA_4o6T6_z_7icRBH5-kmoOtcXcPaI0nWrTlsqlmW1Sqive_cX84IKGfaZrQGYCCCf_WsbL0amfpfrroa9aJXLyMtdN1Sbb-YftqCI8ZzQtvl2feRCU0zhtFk8SdVTWw4uKtD-GJTvZlYeda9FyCqp2CS-clEFGV0XiqWhS1wLP5OlBPjQ4BnyqBjZIYtJnSA7dDUmpvAEwsiRkC3fbSKZdRdk0l_z4WtcvbKpmtLlvj9M8CMF_PtNUvxV6sFB0slx3qRdAFw0l7RjmoHQu5hr8PiRmLdkPpDUSS7tTsblWXpZWHK8MHzFxrqWfnXxgwSO2zsSTG1HJFtAQrGt0N9YiT4iFwyYmGqMw1A2ufwoATYp4XkkjObnUnKbvVrkQzTvIEDVv49N4HfbhrkznWg_3z4ADRS_cvyJvFkkCJX4wr6rugjsvlp40AYa_NSVT66BR9wa_8uHcTySm1U3lWYz97BfYeLee-_dHJUC43sKi7ud62SR9FE9dte2jMxPHacBnPLrwJs45mK7iRxplCtmxQq7gqcJ_M1SFyzL-biN8ytFwrYIWJA7VsBmQdlr1LVRw_DjQugr6bjkPW1nFs6FfnVbNaf59RfS5Hd_yKTMViqm9kHRZi9fmjCGI5pgKJWI_QT9WLb0NWyXITYMYUjSILhrV49tGM3KKINif8afAB6IPqym02LqIlDZByNF5ScLpf2VxPfr4VKQSEvw__MdgdiWnMcoXuV1JOct3ideFa4gTjlk9qCV2x1mb2vVi9-vKwmkQXvqjPIweN5iVBz8VHn6Y_bR_M0v9S2MJ2IWuxYm0evqlzSCMdmKGJcTyUIhfW8xoCh2ROLC71CRlYmUMmVG53Dk4t47l0zKbY_VilEIWtAQ5mh80ETSuR_98cynXWY6nY0u-wZsno5XUAR0lzyPOl8JhhE7XbWx6OsHJXUky052khjyc6nSOPgtjtm0KU9LrdNcZi5_-g&prev=RQ233ED9C80091CC) * ICsense * Hasselt * May 6 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem Email me future jobs like these → Email me future jobs like these: OK * [«](/jobs/design?page=3) * [1](/jobs/design) * [2](/jobs/design?page=2) * [3](/jobs/design?page=3) * 4 * [5](/jobs/design?page=5) * [6](/jobs/design?page=6) * [7](/jobs/design?page=7) * [»](/jobs/design?page=5) [next page](/jobs/design?page=5) * [«](/jobs/design?page=3) * [1](/jobs/design) * [2](/jobs/design?page=2) * [3](/jobs/design?page=3) * 4 * [5](/jobs/design?page=5) * [6](/jobs/design?page=6) * [7](/jobs/design?page=7) * [»](/jobs/design?page=5) #### design in Cities... * 781 ![Brussels](/public/img/coa/be.brussels.png "Coat of arms of Brussels") [Brussels](/in/brussels/design "English jobs in Brussels") * 224 ![Antwerp](/public/img/coa/be.antwerpen.png "Coat of arms of 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Soignies") [Soignies](/in/soignies/design "English jobs in Soignies") * 61 ![Hasselt](/public/img/coa/be.hasselt.png "Coat of arms of Hasselt") [Hasselt](/in/hasselt/design "English jobs in Hasselt") * 60 ![Charleroi](/public/img/coa/be.charleroi.png "Coat of arms of Charleroi") [Charleroi](/in/charleroi/design "English jobs in Charleroi") * 60 ![Ypres](/public/img/coa/be.ieper.png "Coat of arms of Ypres") [Ypres](/in/ieper/design "English jobs in Ypres") * 59 ![Roeselare](/public/img/coa/be.roeselare.png "Coat of arms of Roeselare") [Roeselare](/in/roeselare/design "English jobs in Roeselare") * 55 ![Bruges](/public/img/coa/be.brugge.png "Coat of arms of Bruges") [Bruges](/in/brugge/design "English jobs in Bruges") * 50 ![Ostend](/public/img/coa/be.oostende.png "Coat of arms of Ostend") [Ostend](/in/oostende/design "English jobs in Ostend") * 49 ![Namur](/public/img/coa/be.namur.png "Coat of arms of Namur") [Namur](/in/namur/design "English jobs in Namur") * 48 ![Nivelles](/public/img/coa/be.nivelles.png "Coat of arms of Nivelles") [Nivelles](/in/nivelles/design "English jobs in Nivelles") * 47 ![Genappe](/public/img/coa/be.genappe.png "Coat of arms of Genappe") [Genappe](/in/genappe/design "English jobs in Genappe") * 44 ![Arlon](/public/img/coa/be.arlon.png "Coat of arms of Arlon") [Arlon](/in/arlon/design "English jobs in Arlon") * 44 ![Oudenaarde](/public/img/coa/be.oudenaarde.png "Coat of arms of Oudenaarde") [Oudenaarde](/in/oudenaarde/design "English jobs in Oudenaarde") * 44 ![Sint-Niklaas](/public/img/coa/be.sint-niklaas.png "Coat of arms of Sint-Niklaas") [Sint-Niklaas](/in/sint-niklaas/design "English jobs in Sint-Niklaas") * 44 ![Veurne](/public/img/coa/be.veurne.png "Coat of arms of Veurne") [Veurne](/in/veurne/design "English jobs in Veurne") * 43 ![Tournai](/public/img/coa/be.tournai.png "Coat of arms of Tournai") [Tournai](/in/tournai/design "English jobs in Tournai") * 20 ![Deinze](/public/img/coa/be.deinze.png "Coat of arms of Deinze") [Deinze](/in/deinze/design "English jobs in Deinze") * 19 ![Waregem](/public/img/coa/be.waregem.png "Coat of arms of Waregem") [Waregem](/in/waregem/design "English jobs in Waregem") * 18 ![Tielt](/public/img/coa/be.tielt.png "Coat of arms of Tielt") [Tielt](/in/tielt/design "English jobs in Tielt") * 17 ![Harelbeke](/public/img/coa/be.harelbeke.png "Coat of arms of Harelbeke") [Harelbeke](/in/harelbeke/design "English jobs in Harelbeke") * 17 ![Hoogstraten](/public/img/coa/be.hoogstraten.png "Coat of arms of Hoogstraten") [Hoogstraten](/in/hoogstraten/design "English jobs in Hoogstraten") * 17 ![Torhout](/public/img/coa/be.torhout.png "Coat of arms of Torhout") [Torhout](/in/torhout/design "English jobs in Torhout") * 14 ![Izegem](/public/img/coa/be.izegem.png "Coat of arms of Izegem") [Izegem](/in/izegem/design "English jobs in Izegem") * 13 ![Tubize](/public/img/coa/be.tubize.png "Coat of arms of Tubize") [Tubize](/in/tubize/design "English jobs in Tubize") * 13 ![Wavre](/public/img/coa/be.wavre.png "Coat of arms of Wavre") [Wavre](/in/wavre/design "English jobs in Wavre") * 11 ![Geel](/public/img/coa/be.geel.png "Coat of arms of Geel") [Geel](/in/geel/design "English jobs in Geel") * 9 ![Ottignies-Louvain-la-Neuve](/public/img/coa/be.ottignies-louvain-la-neuve.png "Coat of arms of Ottignies-Louvain-la-Neuve") [Ottignies-Louvain-la-Neuve](/in/ottignies-louvain-la-neuve/design "English jobs in Ottignies-Louvain-la-Neuve") * 9 ![Sint-Truiden](/public/img/coa/be.sint-truiden.png "Coat of arms of Sint-Truiden") [Sint-Truiden](/in/sint-truiden/design "English jobs in Sint-Truiden") * 7 ![Tienen](/public/img/coa/be.tienen.png "Coat of arms of Tienen") [Tienen](/in/tienen/design "English jobs in Tienen") * 6 ![Genk](/public/img/coa/be.genk.png "Coat of arms of Genk") [Genk](/in/genk/design "English jobs in Genk") * 6 ![Lokeren](/public/img/coa/be.lokeren.png "Coat of arms of Lokeren") [Lokeren](/in/lokeren/design "English jobs in Lokeren") * 4 ![Aarschot](/public/img/coa/be.aarschot.png "Coat of arms of Aarschot") [Aarschot](/in/aarschot/design "English jobs in Aarschot") * 4 ![Turnhout](/public/img/coa/be.turnhout.png "Coat of arms of Turnhout") [Turnhout](/in/turnhout/design "English jobs in Turnhout") * 3 ![Halle](/public/img/coa/be.halle.png "Coat of arms of Halle") [Halle](/in/halle/design "English jobs in Halle") * 3 ![Herentals](/public/img/coa/be.herentals.png "Coat of arms of Herentals") [Herentals](/in/herentals/design "English jobs in Herentals") * 3 ![Seraing](/public/img/coa/be.seraing.png "Coat of arms of Seraing") [Seraing](/in/seraing/design "English jobs in Seraing") * 3 ![Vilvoorde](/public/img/coa/be.vilvoorde.png "Coat of arms of Vilvoorde") [Vilvoorde](/in/vilvoorde/design "English jobs in Vilvoorde") * 2 ![Lommel](/public/img/coa/be.lommel.png "Coat of arms of Lommel") [Lommel](/in/lommel/design "English jobs in Lommel") * 2 ![Mortsel](/public/img/coa/be.mortsel.png "Coat of arms of Mortsel") [Mortsel](/in/mortsel/design "English jobs in Mortsel") * 2 ![Saint-Ghislain](/public/img/coa/be.saint-ghislain.png "Coat of arms of Saint-Ghislain") [Saint-Ghislain](/in/saint-ghislain/design "English jobs in Saint-Ghislain") * 1 ![Braine-le-Comte](/public/img/coa/be.braine-le-comte.png "Coat of arms of Braine-le-Comte") [Braine-le-Comte](/in/braine-le-comte/design "English jobs in Braine-le-Comte") * 1 ![Diest](/public/img/coa/be.diest.png "Coat of arms of Diest") [Diest](/in/diest/design "English jobs in Diest") * 1 ![Herk-de-Stad](/public/img/coa/be.herk-de-stad.png "Coat of arms of Herk-de-Stad") [Herk-de-Stad](/in/herk-de-stad/design "English jobs in Herk-de-Stad") * 1 ![Heusden-Zolder](/public/img/coa/be.heusden-zolder.png "Coat of arms of Heusden-Zolder") [Heusden-Zolder](/in/heusden-zolder/design "English jobs in Heusden-Zolder") * 1 ![Lummen](/public/img/coa/be.lummen.png "Coat of arms of Lummen") [Lummen](/in/lummen/design "English jobs in Lummen") #### design in Provinces... * 781 ![Brussels](/public/img/coa/be.brussels.png "Coat of arms of Brussels") [Brussels](/in/brussels/design "English jobs in Brussels") * 482 ![West Flanders](/public/img/coa/be.west-vlaanderen.png "Coat of arms of West Flanders") [West Flanders](/in/west-vlaanderen/design "English jobs in West Flanders") * 419 ![East Flanders](/public/img/coa/be.oost-vlaanderen.png "Coat of arms of East Flanders") [East Flanders](/in/oost-vlaanderen/design "English jobs in East Flanders") * 395 ![Antwerp Province](/public/img/coa/be.antwerpen-province.png "Coat of arms of Antwerp Province") [Antwerp Province](/in/antwerpen-province/design "English jobs in Antwerp Province") * 322 ![Flemish Brabant](/public/img/coa/be.vlaams-brabant.png "Coat of arms of Flemish Brabant") [Flemish Brabant](/in/vlaams-brabant/design "English jobs in Flemish Brabant") * 254 ![Hainaut](/public/img/coa/be.hainaut.png "Coat of arms of Hainaut") [Hainaut](/in/hainaut/design "English jobs in Hainaut") * 188 ![Walloon Brabant](/public/img/coa/be.brabant-wallon.png "Coat of arms of Walloon Brabant") [Walloon Brabant](/in/brabant-wallon/design "English jobs in Walloon Brabant") * 105 ![Limburg](/public/img/coa/be.limburg.png "Coat of arms of Limburg") [Limburg](/in/limburg/design "English jobs in Limburg") * 94 ![Liège Province](/public/img/coa/be.liege-province.png "Coat of arms of Liège Province") [Liège Province](/in/liege-province/design "English jobs in Liège Province") * 70 ![Namur Province](/public/img/coa/be.namur-province.png "Coat of arms of Namur Province") [Namur Province](/in/namur-province/design "English jobs in Namur Province") * 46 ![Belgian Luxembourg](/public/img/coa/be.luxembourg.png "Coat of arms of Belgian Luxembourg") [Belgian Luxembourg](/in/luxembourg/design "English jobs in Belgian Luxembourg") ## Select languages you speak Save & Close Cancel IN OTHER COUNTRIES * [Germany](https://englishjobs.de) * [Switzerland](https://englishjobsearch.ch) * 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