[![English Jobs Logo](/public/img/logo100.png "English Jobs Logo") ### ENGLISH JOBS BELGIUM](/) [post a job](/publish-job) search # 3173 design English-speaking jobs in Belgium Include languages [+]sorted by: relevance · [newest](/jobs/design?sort=date) ### Note Some links might not work from outside the European Union. Dismiss [### Mechanical *Design* Engineer](/clickout/874c9e1482013af4?ql=q&sig=d2656fb2af0fb30a081a33126f83004779b331e8&e=18qxqxT3s5V69HhxqezDum1GViE_mJlmPUKPw8_Q7BxGIw5Wage-Sn2y8_SVYZ6jNdMwJVCVDTJ_-ZMevKjnvAD9_WEG4gbfI-83FLyQBNggZYLA6pSucO7ff0l5SkzE5fEBIQwrL1hwWBcJMCUHA0OGemFEEOB7tLlpeKET1dYDlD-pQBWJNbVTU48ldGYJ3XOR3p4JksHerwh0Z8vO5ITMQhKrmYSTczEo8Ub4RteWNuYGjxs5Efi_bk5SSTAueoPtkr4wa2IJbIV4s2GcwvVIA-oC_AcfPzU0jOXhQrQlGsNlCH_E0YMP6jGkkoF5OoqPNv1EHNOXx8j6YMKXLmO8WF0pIE6e5nov2LX5lPC9FUaSJ-Ktu6bHAj58UUieG395F9QARmilyVtqOEXg3IySYCstdtIj79OYRMl8l1I_mJyHFtNP1Z23je1k2STmRmIfU3dwPP-DtwF4Z0jtBhl1oPNKW-p6ERCgol-yjmVPAGSo7DK1eprWmFmwlNbpY0omCsUYzdamzkOQAXmFwWmbnvMa0f4ioT97dL-jXmQmKgf2iPRH0P2G4NuxYwJZv_u9Ktlcs_EwiuQb-TYxPKQN1sOt3ZgbGzzaXkUnd5QVuZg-3Csb3C9KsQk7wcYJbpsguSdjbTMXz8P7PFzE0s5vUUvN8ybsh35Tvwi89E3gPS04HyQN3srmd6QEorIHdIytju0jU5V_6TgRxdN_7kfCuqI-b3iqYPm03lG94Gh1ECaBkOsJbCs17h5v-KdK6KTK4ViBIF7J6uw4xTk08F8n0hOTYy7B9wWpYSOKFfJU_qbj9JpcxwcNGB1pqtv-hqyZTcdm60W73qYqYuX5RXtICIIR3nOtFKt5aFw8PpGokcWiNnIhWjaC2OIfRJfwy-PPMf6CAfNcGEMlhqy3bReAT_HLnb7DlwF8ROhjr6kmdiFmzISbm-8_e_L8ohAgRxM0ev6zPAE2HyRWZ1RTZikPg77Okv2s1ULalpjEKYkWCm0gsWI5pHjhptO1b_J17cY280WbVUDSYNHuk9yw5Q26Rf-WgkXh5xpgRzve32AhnH6_GWI0tGomH6k3X38Nzq-GrAH77GUg5hsxOy3sE3Tvq3NsC7tjh723B7-VKCjhZlILPyWfEthLFzkS6sMojQWGAFf-NsiGLxSyY6nLtDDnaoX1YioWOOCn2CAMxIPYjBDsArNL_qzeO8t57w-8aokwVTKEBa0AQl1Ux89zgvLB7cMTpV124sXpR0VS_iEVAaks9QINGMZrEASUyvJWKg7QH_G-4Jo5ajGOGBRFWRj0WXgX4odlGTao91f6IhtOMlsFgRfIPEPYaKaSqzqbb783B_Y-wzJfY3xblyTXem8kimLL8WGaAOncJT9GxJLSVJHFqRUVvomwS5Zb8XUuqrPjKxJ5WPjLmINyQNc&prev=RQ2413985A923DCC&p=1&pg=5) * SII Group Belgium * Tournai * July 2 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... to the dimensioning and validation of parts (strength, fatigue, thermal, vibration) Participating in *design* ... degree in Mechanical Engineering, Aerospace Engineering or equivalent Proven experience in mechanical *design* report probem [### Mechanical *Design* Engineer](/clickout/e9629b2745c9b3b0?ql=q&sig=b1432ef1269f7573c77858edeaca0136b791649c&e=V0peMYSE1-0HxNddNCm3qPDyNs6ZG7FPut5d9crpKQf4ueddbSLp8Oqvpz1KDtlJsRGakAGjY2bcOJ4OmcPt3FlclTrfl_QW1rFGS8EHaEnryYCQiJmxzblEV_QwRINvcDZKdQura-CDj1cCm1m21Y4iH7psobvfAIcCAt9hmMvnrxaAKKODSpTHnvNo2K_OdzPcFD8FJcRi2guVqGR7gf0lwsH8jFRd8cKXwfhF0LcWGnfqRyWypoU2I5Oj69-ull6m_v9267EzWRnBdEGvqQ2-4BHS9xLlOuP3ZgPvVdHqlYUMYp-81pZZnAPTKw-poWEktjff8AmBYAa67OUK7XLzheWTH4qtXwUHTLmylHmB1Ic9Q-k9KqVA3V5V-jgL6vDqRiJ9_D-UQ0fb9WpHMzoI1nVo44X2OQQJeV9H-XVIaiIJfYvl9px2kK2PBfbc313dlXqqKFo9HzOM9vgBkpnljDn3EqIl2HMUYCJ1mPFaDtxA2kowt2ahdsGK2nXb7H48883MxkYQSTUq1dJ7SXtw15YOtXilqE23zwMLFqYC3ccIHc39oo6pABVhyiyDEaUKwbvfZUZckJkfkyA2Qhq7aD4CfxthwC7BC4-x1r4zYur8owTBhu2yKJPWn91VtYRPulG3mZY7mwPgaSr9ivZUf7jVDbh4eCxnZ5Q8FgEpvK56vuKOVQZIMjj_jiMdTOWDuxO5ClgzMByOg_1dzOcwee4KzAA-g7_f7Eezqk_7QdvSLMowcp8XkjPcdXnzLPLQhTTj1_MD_yW2Su_Nb0ce0tXwpvI15BybL5weYdIVBIS1KrWiclTkwvvJU1-yLsBRabKSc58t8MSSwCiAuPr2zM-p81pILEKs1EPOr28Z6J50WdVWN8Hjk22wF4NfBxOfYcJv-q81jyPDIRdnW9EE2mQhfsHE2yGZ3uJS6XZk23WZhJtGCcZftMfSt4U0pMEjFRI0_RDUHwjUyFnw6UWdb1x97-nqKeNkfUjON97sGlm77_zdLRynhmubQU73dIe2iZKLF06KmmI9NxVHK-YLRFky_uzr6gk74un2P4rrdIoES4JRhZwLmQ8t-MUktmSkhLFYdEtNU_C7qtCqtMsB8YjgVXb28zvfgwt9R2vslmj16OJwNI5LpcImfRdrTjvRu6gdj7KmftPXCrH9-732EVP8s10bmNpY-qKMA9ManDzsEPQ0Y2xvvjSncwQBI8rsy5YjO7hkRjwRunM2tMeLWT7JoWXv9cwl9M6akIgUlfvGYjGxlhApf-FIuXUFNSIV-v71qEn1grjagRQ_3nuz96NXpMP-qtV6ViUbB2HSModuusjzelkMyttiGX_ugyeB4EwZhBfxX0BY2mEM5tzvlHc4R8xvZ2XmXK-qXeKQ9JKfNEDojybxBcpQILjprfcJeTI3HfjaH7Ib&prev=RQ2413985A923DCC&p=2&pg=5) * SII Group Belgium * Arlon * July 2 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... to the dimensioning and validation of parts (strength, fatigue, thermal, vibration) Participating in *design* ... degree in Mechanical Engineering, Aerospace Engineering or equivalent Proven experience in mechanical *design* report probem [### Mechanical *Design* Engineer](/clickout/b2fdb493b303a450?ql=q&sig=0bf30977954d2aa5b625aff3c31ff36a885bb457&e=Qsm7zU6vsDDDpRU7cxJuQQWpD0AjvW67gVG4vo4vFaAExC72BvNgPBAiMXuP4y91ka4IJ7ZYLiDKB-9VagdfTTsm-eHSbq8W943QPYokbE3PWoD0ymUjCH2KAF8784SQYuB9V8dsSDPYc2V-bDbdfUmMF2m20JrU4jiFtGUaKzNxZJ6LzVMQj90gnw3er_EdLm0Y9NOFs_nEYA8GU0wpewpLsJ7imRiBLnOE8MU6m8h_hGWKZM_YTe39QuttAE95k3pEL0ayyEerNLNUA87LINYyVc657kekrsuXHUYg4mXE5EHky8uCS5jzgYsbeIdSdfRKw530WQT6t9TomCWwfTvZ34CnQO9GG9KJH6QdDtO86XX54PcNgUocA0VUsT2EgdwjR3oVVBnfXvsPx8hPeaIliBK2nQlFE3bfAn96SQTP0EKnT5SUJs_xLyHExzWg-0o0XH0K06VrbKPddv-IjNmb4JppRqkMA6g4VvPv7JHw9EU1b310laqF12iOMub4dluvhB82a_D4uQCyyY4co_iJcABc0I9kuSYCeVvrRxYMYIyf_L8OxYrYuLzCtdue0vJfc6kkGM3l7mM6FlBq5jueHAeUzqfSBTxprKRUDuPQGXOwHmR5RZ4FYzlHyw85rTQhr6tldnspGS_JpiLAL3aXfsQUlHJ9EYVAXsZ8o_iQRyXvgjXFXnSg37kXsoGPPFcJw1xuPJaDxm-Legh7t3r7v6_4Ze563mO2scNFb9h6-lebaL5WmExsFdRMsFphntCXez9esMFMPfFrHVVaB_9BSICNRm8s1nzKrADMd3vXM7KxMLNFoYfam1MEaQ_3-8YUkjEA-nz4V3nwQuu9Yi1fW6rm6emBI4RE1Zp7lvFrEs4Nxnatf-_dad_MZUyGRF0F9moASGurrA8bJgEgeY9SfYcSY3D-KheoswvBNXx9p1XZzvjljkkgYuXlYUG-lntiJJdKf-1ntfHagg32rmUXUnNldvnum8dJuswbYWIr_6knsV2IyvK-3DERrc5D_rKg7hpr2igl3h0F-nXsJsb4ATD7u9EbLn4-bQ9fyhYa_FGGbqgjDQN1zBAcw1HrIv4FsCpwgOt5x39wDOJCLL8kqPn0q4N9vpzIsqD-U-iEPLB8wlcftMsv8QY9Ewo6xRzoOoPrpFivUufdo9Exe5LSYpMbGVFnRi07ue8IAIhgbZZVdcir2gLeRnTPKaTNCulimbCvM7WRHgunLyW9nMdhdqRWQ4f_4s8c833Vhes2tcLIi-U5tVD76RHg3zC650oSNuI25dRrQMyy7S8qcd6snGAizEIe4P8ox7Ac0F9HWus1OcPkEyevjg9ZOsySadC-OFQX7mdj0nhDI-f3PJ5dFkzuLJ5xHYp344WP9HB64wXqWQOwTRkr2cVJ062aeyOJDK1CpmJGkO8j&prev=RQ2413985A923DCC&p=3&pg=5) * SII Group Belgium * Namur * July 2 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... to the dimensioning and validation of parts (strength, fatigue, thermal, vibration) Participating in *design* ... degree in Mechanical Engineering, Aerospace Engineering or equivalent Proven experience in mechanical *design* report probem [### Aeronautical *Design* Engineer](/clickout/ab3b87f2b43c7d0e?ql=q&sig=a87c023c528c050519a6663a1874235eb0cb09cb&e=ElcvngAnEqHv_MU2qE1L6k1Oqem5_4B7gvrBmP-dEtlun30I9x0MdNyQ9VrFtfLEjIGFddw34olkYyoIuGfg4wnNCKO4mQs_uepElpXyPFvvdls0KD9PQTPjlAoqdcII6yv9tLpookMdCuT9HQAvDaA__Re0NeqG4aLWkEevTTN0-VHEch1oBX1A6XVhgdg3rqUrnerrS0l49eV_5wx-ZDA-vkF6l3Lhx4rYbAO3Wxeclfr2y0cPHuFPyOAefkMZcuRCP4uXnIqMJTodALP1M_BC3_6KrXJq_BGLanDZU3TTleILIyYD9NK9kydVUUVtZD8pgxWXv71dbUO1yqoXCZ6PPcGGvBfHieBdfBWEw1XhsSrzlNMrA5qh-UI9FqWnRDwYBQbcS1ypRIToB4WOEKMouEJLo0p3kQumz6uyjFfVGrCGoxcwb77lOPWknzhYpokrsVzJeFoFzdguJo4VzyMYa3abwixLfOuMl2DXspyFuv9zpdUniqhz0zvR0RbefXFubFDM_rnZU5gr22RTwlWVcVKkyLkfYSlZpFzPvGpIMPmTbxi9UZHGB-a9mjl6LJMaa0VAepjXu5C-Mo11q9hqax5_JfB4m2HKzun7CtuRPj2f7Qt4vDLSGHlv27NKPM55k9tJ-RsHOTfKqVIvxDdDwZzgoZAQrSk7Li8kuL8bBsv7VzI01V6lC6Zbv5ojuQCMyhxGS9VYdluaCy1b6Cu51no8_72crzKbYzecBchcmCOt7oUl3-bT8OEwFO7IO4WJEJ0mzMj_oEF0TwvPP6asuIYcMgIPmtNFFPVA_48tgXJEuwbfm80VP6qtSiKZnN04yCvnJ99MjOCq37JX2yhQU0gz3f3GX_YWRbzFL--oRWdNdN1cbj_9iw6FRHv4ZY0szXxbJbYIfEUBxMr6e_ihX1qLSrjcrLdx7YWilpd9GMdsLmHqRxSBURJHJHGIGV23mpLvjjon4PGbW9_6P321qdOi39PUlpAv1HJDvuV--m0lKxZc2JEb8PxzDONhh6l05Tsq9s8JPRL5k_k9ax6MAuDrnlput8PQB9BUwEwy2huKuvoWJAlmJvcvQEyqfhbwYhKCn--TDAC76wmFKba6V-g8hXaObFAlZ0DJCPgIE2ZAhVl3NMcYznhyYjALubss8hdFtotMPR4eywOz7Y52HVpncm8UPUhOFK1_r0DvZ7g_cQ72Xo7r39UUY0KiACTziYbCLQzsktCysc4TaxC5VMtceP575P95krC5ei1aFlJi6NXbwNc-DN8gCvYu3mbLBCWOC56OS1maLMcyWHLE6_fEPVTZ6dQIfCdUGWIRRx6pkUTxIirYVvCAjlTGDPQPFbsk_k6wY1Lw2t6Tk8_UbsdVQBbkO0qtNepNET4hGwaXpBH79sbs-ZsOcDVvt8TuQVJFhO08IELH&prev=RQ2413985A923DCC&p=4&pg=5) * AYES - Management & Technology Consulting * Wavre * July 7 Aeronautical *Design* Engineer What is AYES? ... First experience done in Aeronautical Structure *design*. ... Prepare and complete *Design* Definition Dossiers, including FTA 3D annotations, and Part Lists. ... modify detailed 3D models in CATIA V5, based on available concept designs and established Aeronautical *design* report probem [### Aeronautical *Design* Engineer](/clickout/7f81ab8bc21303b3?ql=q&sig=3f80bd1cd9de10a7964be324977c340ed73d4ac1&e=Xx85b6XlFSnOoRjouvy0Ce5KR0bh64om8jRhQKkvWZeEpp2osG3l-Y25LmMcG9oInUa97cD36DuL45EKyT9dbtfmyo_6lxeBZkW8bezG6ZytX5U8AMfMJmhbvCYHBt9Q8G48H0_pprL1nG8c0ZZwIB1oprwxgWwMDf1ZLokY8bCV0AwQuxcbhEZqX_cTxq38hEocT8dp3kv1aVzQBTnTMD5q5ZuUwNEZn1QZNjJzcTwzFyt-iT70Kx0TwNLtRlTcEZDkKL85ULeNCCv-fm40xDjm4iNEmcb26sYbq3bTowlMyGTJ3z9o9CB7y0neTkxbjwBa_GE8DxibA5iolDzNgmzOxyd549PEPDdKVgAEMCzm_xM3x5JRk6cWtPNSVC05yAnxrJ4X9bGj2WqLMffsHJK5-j2ZNqZ1dMbM35MJhUaqvZgGjbJPbTSv6bfcAiZ_alF2dh4wkWn5XbHwO33OrfTjDbgHNvJI9lQM7hUjPKDatecm1G6ZMwQb9mAvfvSn8psHalCCFiEEMa23yfB6hn1AVhhtchzI4yMnZ2ca2zLQdzl5pHPyxBRMd2mayvKcikFblKIPoxsxmj73czefVHoxp73hwHL-M92IOvl5i51dPk7sOvyfnMBv8c4O-Dr1wKEUYB8CKkngtNtB_KN6lG9yqStrYX8PTyW1SXVNDa8W6wnNuAKrZ9ShK8mYzaAAzN7wNzbQTmhR00X0pnK4vKnPeAQDv0xY8OhX1dkDEsL_CqAJyzsueqxZu33PeXH7jWyl0rir9gkFUZWI4RP9w9ijRJavJCRlgKE53B40c_XMKLwHJzncYK3-VN2DNkuNfRAkfT37Zgbe90Pnnu405I00QUlrdq1vvZ_sXAWxTMl2wL7qdv3jonC5fMyzXEgBHDbCUdyY7DzjiZXWaBIebWo0dOL6S8WlFkorGdPGepcIDRqhbkl0DVdZWtvTYhxL7MN-qGNl0wNuHSboPXM5_hZ8YSZdXc396FiP-q6Y2XgkE1x5KTjy5HMK6ME8rtZMo6GVpn-NP3QtBAnlx9xpR73CkBZjHMSaVR7UkfvUuZPDZ7PKDCvVz-snfIkA91Pe5rhK9mxVPloo24vDIAGmGc2lT_G4g--IFk9cWDHOfBwuL12j5v0jI8TAvJDvIFIYZwCWtaQ_43zEIEiezMdZmOydwIRDQFi79usuVALLvLMOKv4C7j17TP_xRoq2hVB-P1tRj5ragWKNIf6sgXY41QB5mYINM-EaI53v28quNrDhSXl6mdz3TtwfzUx-pHL_-bBMmvt0iTB7yM_JT6wx_K9DtsgOlhgqxb3PtXpF3zPd0kaokjCYWB0qhKkHeyXiHUxs_Y39MkvaVynbGfuMTvUVk3aWAHrflVLe4JOdlshJ1Phs7z6G4pgUhfncSXi1Picat60j22irFaV-FANl6-uXqoF4&prev=RQ2413985A923DCC&p=5&pg=5) * AYES - Management & Technology Consulting * Sint-Niklaas * July 5 Aeronautical *Design* Engineer What is AYES? ... First experience done in Aeronautical Structure *design*. ... Prepare and complete *Design* Definition Dossiers, including FTA 3D annotations, and Part Lists. ... modify detailed 3D models in CATIA V5, based on available concept designs and established Aeronautical *design* report probem [### Aeronautical *Design* Engineer](/clickout/90423427e5b61a03?ql=q&sig=51112abb42f075888dc1380ea8547a8a4cb13ea3&e=JL3j4mPg5b-GIVnbqX847shS4LPtE_Ib0I6-hmW7yGyHqvKWpStUzTj3RD52ls0SExGqs0fikuhAGapAeCDzXcRikbl4vekNhwnW6JIr6FCmHDehoBGxQ58XHX5mkJfU4kzkldgRJAXC7fPx1O_beJmGN3k0g8wRWeKTqb440TUATBblcs3FCuO4pvIPrJg5xX0zAfCAR8cm1ca5GQ47ohsc3JgLv-2h0rFOKYvSvinOaTPj3hCa6eKzOopqhyThIKVtrkPANP-JfwOtQ0Eu-RRRSczHODDLmNjP8KGSGTxHo87iduwdhakK2l88C4Sn27k7ZUlwwdemgdzrvH7zwp_V6nfnfRgFYjBfcS_HcaUpgHioQpO-QkqsIh_yS8dkQKNsjaRUWwXJUQj_qgcvB1zKvUyTxo1Sr9lDaz1q1NwT8tlrqaQpssEq_INI-8IJJU5-MR2Z9lY8ppqu_45MDJ9vvuTBGRliWsVfWjKWB6r0g9W0OrniU9280qJqn1-rGCvo81yXCQ5Hn5nGlX0Vzr90QIL6AT2l1opHcrlcP3w-AqcPwIsBcwI9al7EtnFsQn6dNfIOxS-btwTA4tBy8lyrgPRvQhSqVAf7jL7p86kofb-j2lWDHwSS6xkpdgpDdd7DETMf6zHVv-QxW4piES__VHGpNLvMWzZaVKo0-XsJ7wpFqLYgcSSSYrlLmKmbsG-n6FAQVKZj60191GpIPaM19gW25Thjkc3c4ZypseU77GVZ3l6ulVykLHWXqg6D7Q3QtcU5H1wjL9a79erhlPrnOkeIJZVi7owR8a2CHt9GUEicdnfJclFj7tl0ZhGl7YkUaqayyw7wVn2J4YtsNqebXhiKQWQv52aaj3Jv-89RSdaZdanewfB5nYVcwlv8gOOIZO7yoqpYpCrAKGsFABf92nqwXwkTRlG0Anz0N95A8MDk7RkdghYl-2myUAGu4yQAuF-ibjR-oEgbLV2ltcdirsgWqRJa9Qlmpk4T_jfN7NMovvRAZV2jf-QX9ECdJ7QDCJTzmgia_aI29Y2YB784vxQNsEUc576ICq5DR0kA-R5Tp7P9VQQV4s66aGDFDM0OyyBAXajzveDRQp8N8-wkavplrGhIKosDzERt-ebCQnhJWXaOR5YQ7yf2eU_40fdw5XQv4IIPplbwdis78MczyNIUTosjJpy7cfy7jsYTNxGFrwhGDGQTBN0Ry3iS7ZSBt6UR1psmFADHikyL-fVyfVEVzMfx5BymeDsNtFAA1gKMyqsb5rKkenCgnEfv509un9wlQ2DWgfzruJXvY92eR9_FPR2acCXGO-8ZjT_mVnZBiaJ0cuFYxc9GgugHJoqRIQgUZbFTU7WoFyd2VTgmJoqutlc-0wC8e1GnvoUkjxi7-y09ek1iqQceJl6m3UHcpR3OhViqicmnmd_oIp0pbW6yh79wyg&prev=RQ2413985A923DCC&p=6&pg=5) * AYES - Management & Technology Consulting * Hainaut Province * July 5 Aeronautical *Design* Engineer What is AYES? ... First experience done in Aeronautical Structure *design*. ... Prepare and complete *Design* Definition Dossiers, including FTA 3D annotations, and Part Lists. ... modify detailed 3D models in CATIA V5, based on available concept designs and established Aeronautical *design* report probem [### Senior Digital *Design* Engineer](/clickout/1c09be0d46a6478c?ql=q&sig=f6247b993dc0b351fa67a5d1fac7d2a5260c203e&e=oTGcChqWbPHC6i_L5Fg9x2d-n7L8RGEYauOBARSaifXUtY1zI3JxqoAQaoEmSewyaYxLJb8i10rUkEguYbOrkf9K5e1Cln9eP-X5XnW55joYzI4DF7rjQvwZtcTV2B9i7i08X5vhtAQDw0BKKjfDRGeAhqn1WddmnGFzrRDn1J51AcXXrGDCe9ZZe2ByA3HVdmOlw5ZECx-xJVRw_2eeZAjB3uvhRN3mmR6-zhjV0cIfCC1BmIn5nEJ3QHgdDCwGAUaxbWAsutpMyDApKEDxvHuLl6Lw1WYaOahyftVcOtLe5uENLyFPoVWfWJFArEIar8oHD9dzXbokNea4Tb8OmwGwzCRT6zpHbzOm3waZk8CQfWfy8Hy2lbRf2xanXMiKnaq1izADepU3tVVBgkAtDLPww-93iNNuALx2HTVuaRyPV4k-N4JH059jPLJ6fuAAtLPqREKBUFkb9f6f3tb4FJ_AHvQO4S7pS3NDv-TfHbQJTt1rVwsh8fnVjIXRCtWrX8KnrNTF5JHnJDi9ivVZLmkdSzQOQYoSsEZf005sY703vfVnGNQMBKe5Db5osVQxsJca1kNOACbBK7klf0M915JA-zpQFcA62KEQmA3kXGfYI8ZUSMbewWG_RBzW8mxhoZZShEn_d9N39YNmno3z767TVhRCh8M92CsFJT9yTG0ZTNPF7VjqMfnaC7_tUNicXBROrHS7x7JGyomP1wPjWTR_82epf3TIILLd1HXKqrC_ES083I53NIFfj4XiwX-6W6lUaZZBIDT-gndQ1fdYazExNUfEWhy95YzKGg-kRo4yt4n1awfCDCgpTNTIXq0qtwS3tAaGlsvnfFZEnndRP6WGQhbBXZcHE4ff7d9CACKClCWGQb-R3auLjqaNab6h2iZsS2GcRJYeMZkporlI83EvgTcJUQBB9uFgl05g2tvHCCv0xCeU91scJi69TbSIRviOvxtCal1actHz9qRXjrMfcxemc8_5eJsJx_8M66a1zBaLefkEX6yfKDcn1PtUr2mWmFxKDJ9uA_nQPFyTKJ7X3uRs3jv6NqQNBGd8BaqJtWjkhF5DHDf8Nlz1Pk28no-vcoGfp7F5Je9qyNn6UXBsmer0gYnJ-rEtJOyDXOJYgRFziU5I3WRPWMWt5EdcatunztyRxiZBdFOnc3nrCpTyP-EsbnDVwKQEUYdLC2WGT59W1sX2cy9zyFE4Hk8YfIytybDi0FxkCvoEAOA5Z4gIzo3AKhaJCnduYTI-Vk5i_2_kw7H77-gQEbXvYfAA-AEvIckI1qqqZM7PLLSEQg-juaAlTRfFUmdderkh0flyPHWNsGEA-EOfodjv2VymUuHIdNFaj1q5luxX7CVzmC46Jv815KNsCsHmceui4DMVgujJhorpqNyWasqT_o04SofESGf482Vdo1s06cU-J-Y&prev=RQ2413985A923DCC&p=7&pg=5) * ICsense * Veurne * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/3a259055003aa9d1?ql=q&sig=aa3e101d25e53e2097d09543c1469f6c8261d0b5&e=eGV6f2pa8g1FnSCUqU7Ag0eYzfoMEXtFCt02TmSxODlNJSKzrAjP_i9-Wr90S49YIN3wF1zaH8acrvOkzNE2ETvU8Tt6JwgdcwTxwkoTf5G-Y-gHOZGws6ERTgRsHGzZkukf5iv0NFfmcZtW62WeQBzPbotmEm0WOYy3dFYB5MKbb8eZT04eBBKvxWIUTV4sIh5B11NrD0n89TDiZ4XiHxtnBGW49M0YeNTcHEJo4J3omUjCQ8UZMV2kphVMv8otZg4SNuJaQd0cCUHl8Av1eJWRQ6dI7HZGdMDd-uH2QGdMOgRhSmcwqX5j-06rzOMUBY5Nl8vtyy4TXqNlHfKOp7K2O9oXEFf5uko1xOeldwLsAL9PsnCrRLBo5RQNkucTRfqFBddNi4CWAKpfjV8r8kO1KN2roqJOA2aFVGoXqbBfie1LOOgPt2opitILu6KWXIiA9ZDzRKlkXPxrgqAuW3wvIqdEmoJrjMbyv_PcGMxFZ9_OkaY24DhELqK-n5J2SzWql_J2c1-6pp0scw3Ddu1c3E59Byav_I_j4rOxU8zLSC5zI3UsjXahmeLxNLatFNXYPdoYBdi5Zv-bKtOgISYNiZApoNcC1tMw2S7pIoP-XJ4D5bt53kdrAtDrVMtjBEY7gJvBweYxVek1XN7mhRYZeWVOmPMtcVlb0YZHrAOsevzei3hcC4B_QRspNyfEZZpChr3inmj_wDJAn3UswDVEaXPLPXcRsxSOzZOME7fjoAk8AP50uvBAAvPFuvLhpK6WpuLwcG8fBHtico-JUVnFjfT59BW2MrVitF2YXhOY6GyXtqW5yEDKggJPEUmVYDOPG8NkWdCJKN2xkL2OBxUFbMtGUcITMTZgPqWPNPTQ23VjfheBsnqymWTcFV96Rg88sNfBTXreByrSydUquhTOk8B9jfw16md4p5pbaX89LOevzxjSm88sR-Z5-wS9mbyobzVhM76dZn1OQvAWuUx0w3l6LRBQMAdBebo5GEHRgDgGO4B68_PZP1wt3SmU0CcV5JyKfNI9zH3QvYbKM26n3L__i1lBVRvkhMs1j_VkAhG5B64jHn9VrHeh-2L279X5Ngg8X6hY7LKMgIyLSwaAYZDSYY0tbLKg0uFEPzucUTJ27Le9YfEsGJjJLWaSza_79XFNKhRyL2THLDsssL4pe9hmAAvq6Kxuz8-4WwrhC9CgPJ4Qln-qSvTQBll0x2NsknlHOuIabJefo3gDzfAbBMJ-bRK_H7-xr47LwYyfDlG3FLSOxCg7LWdemIOVCPKhrAarHIgZFDaNAqJBJxNK37ju8lTffKWstwMDHsQysuNK93_UKlGTNl86lyewOGtFjBKz8jB3B9isdY3nn1mZIvj4ofOSvE4VDtUjpFgt6efHwnaocVU3yM5BkN5sFXqxW0FoDaGiPlDuoCrBlg&prev=RQ2413985A923DCC&p=8&pg=5) * ICsense * Ghent * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/74e49f45cba7082b?ql=q&sig=583befde9402fbb52769d21e2bf91aad279e576b&e=ZJ1B4Hnw0kvZ8w2L8n6CW67fglsnMUIqu1GwnhT7LSZH0Em_HFvI0w5uYP92raKRTiCqs-2wO6jLlWsego3b0d5rwjsQdiAcKzLLc816o_g-e2FHha5WLcoLJ0B4Q8N6dShbnmBn6_ICS2PsH-ktyl6rm0CptZocz7llG04Y8_jMuDJEiJt_Ue20vNpadbcDOGERnKqCAOAoEszf3yDR8F7-y6v7phbNO58rnTBx9j1rr3WkNvFdBB84CwYSjxV7Dy_lE-3aRzhH1eF7ck-ecRngctpc4Mrxk7KZRhYWZB0bwa6SEx79iM4mFnh8eFtyFRey981bknW7hDMk3K_GtlAMtwzUaKnFddlNDtymKFKGU4E3UfdCNCJgeYAp1NeoOsmK19UyOC9R4Z4yMURQ08SHTMm2rJqL893TRZyQ5F5VmWSEhTJjL3tPFqSfrAWzSaPCkEsuyvjatemjee7We6_qT9aoVweI3blOS7NpcXvWvNiKM-tvEo2xc1i9O8vALexMmB3LCncc_MqwgpeO1Awf2sZTx4GYaaZMgFX_KtJH3h0NzsafsEWDFtZwJI9jWOSzhvQrhymNmuzV1EL5NW_6CEaKhI7IVjanH-M5JXLy7TH4LOzpHVpc6Sn54SihVL3cxwUneCxblOYKNhqbZu9F6XLxV0vz9ah_4CZF3YJsZWNdHtwm6ySwh-KTlv35E3B9WUrgGwzWhyewIQ4ySl8RlhtFkUYApDwpIGQ2oKqp67ubSosXygmuh56EiWB9vkI_yiN9rLarEJ5NoWRKvrQ_tz9gEn-F3kaONOYZrN42POwgwWdh7mJUzM5uwEpGPZ0yzIclHMLX9-YS_tYdc4CyyPmLAvIFYRQ9-R-0-6Eqr7RkW9_RZ29Ry-clpyHBgSxKW_PEre8-zad0LzDgdJEKhqcBCEV7ntlom3AmtFZPPXMP1OHvCaKhE1uj27PLJqfSzPgvwK1CiFMi6kFhAI9O3vx7RIV6GJlLrOvHbNImJ8sBkgnYyrusKdnydeaDaTLKeBcr53AF5XkR8P0JV6FKgalkfwAezQeTX_YB5DmFaoDEzM9bAElDZVN_ku2pr9tJZDNGuKimqaJhCFAFmP8F1sIPxDAgljnP7z2k80L23d8zFzjWLiY7vZawoMuSm7EPMxd6szPBhwvderYAFVuFezqcqNjoBxvIHCaPQVspwPVsBlNdfIfpkP2Bv2C6BU0LMQrljjkjFqXwEBjAoaAMDNxWKg7_aPTyGoaYBKfr4mUnYGjWAw20sb-Ikzx-WgwdUoASjvVKG63Ja8BBV_-lgv0fQYVKv1Rm8Nn7tX1m0IKCpBWj5xIDDe-oHglLGGlCZOF5rDsRb3PPLzBMQMUKXW7hGS2kB-U0OkQ8iWxFcwtYq20ij9vBQbRb8wn3pII5VwMFBrJDL_84M0LNEg&prev=RQ2413985A923DCC&p=9&pg=5) * ICsense * Arlon * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Mechanical *Design* Engineer](/clickout/fb0087ea7446ece6?ql=q&sig=b8be093840b6accde0b997fa693a0db89b0b99c5&e=yYmZDon6eymxOHYoeFzOvjC0MA83RvAdr8ft1KO9QQS8ycjSFxA_elOTiWDuFqzA0cg8Jbp3bHjDUs9uchnJayddl7rXPX-x6vxdMo_2ZFqzxeMxIDvhQmVMBY1R5nyHS93yHrH00JzRK30hy3HlnDVry_kC-_yLRvGTk7J8VZTiUwD40u8c8l6fY_NkAK56vPTdmQzagH3b2F98xzrROi9GSYM-QUTzeo7YTJlvU5kkLFfdMkYWPqPOzAAbwK6Ks5toj9zKJqFppM-ibG2bD92e7oD0K7P_vXnsR1KiQbTEsOAaEEct4o1eh2W1V1bsNp6VUZ-JWetmlfX80FVPv6QF6GwPiglFqHV45sNmmPhbbR8B6E5DmppcZIuyx0rvOUg3HeY2kfyb-4iDWTzY2CRfLRZK-a5fHDl1rxutv3_P5BRFkP41iEhEh0zzA3jjCfLHAAbemeEZCKlQGSDyrvCiSye-BlMlSTKNT6mM8ig-L0X2sZMqIe5NylLaF0l3IAZPoy1qSl__Y73HnVxuvm0eblgkkF3ysIPlSaLn12XPL8uyD82-xy6gRT_y7tKyxWT5Ep9bjCJ9fV0WZQJg0AbhXEvem0SzxrbqhXw7OoxuzxiXcxV6mwko8RF-h923ZDaPazKSqWUaTh-_HIimEBzOSw1eptuWbwszkIwKm5wgaP40U3MrpUK56FLThJAKgJEk4G8eQRE7tRKGrU4B-67sXWdovvM6y8xDWx9cAL1Gbt2vhKeJEvZiW7UfWYyp0BX4ExPlkVzTAILktKhThq1WXnkNW8CKdfAp3CtfGZNM5Pbhg7FQnm0PO7D2w0qYg3jtXGGhW2GxAk3XW2T7upXW526gMLc54A131FLe8k8U41UKGhdrcrTJlGoJTgAl4prSPCb394v7EN7uRPnqfzlpDlP94AgVFNgKnIBMFTxM5rBS_0MlrhL2AUiNeuSLIrWeWctNLI5zXnteZAonYcssY2DHvM-b2OBh-SzglSjLTIZmfkPFrtgBa8_BkvpjJJgnuah7aFW6Gc5qnJuvX8B8xBuFE7P4LLUvVIRkW_JdmVOXyyyQ5d_Ea80VWqCW8eR_pqcgmQDEwCt5UVYDDJZmTF8FfZo5VxRmTnrkA8Xmm9YZ_TBqh5pUNQb2rmBVfE11bqrM0fhMPf8umloGK3_zVcfgMm1TdihDTPVjU0qQo6szBg_9yWCpBPBI8lqIAVFmTsckV-tbuo2FQQmer8fXETzYKIdZjT2JqN1TvwE47mGNyFC4TZARl7zef0G9lcxBqXeAuclJ0J2KVt6T57oPIfRuaxb-QE0fHFnpuauwgTfO1C-QDxEEILvCWRctkVBPj11NC2n7d5ui58Iozd-p9InjlhaRMzveKBwThWYD5i2mbUYo4INgPiW8VvqVIDld48-7BnQlqfEE3QiZq5G0VA&prev=RQ2413985A923DCC&p=10&pg=5) * SII Group Belgium * Sint-Niklaas * July 2 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... to the dimensioning and validation of parts (strength, fatigue, thermal, vibration) Participating in *design* ... degree in Mechanical Engineering, Aerospace Engineering or equivalent Proven experience in mechanical *design* report probem [### Mechanical *Design* Engineer](/clickout/3e2aeab7fa2e2f05?ql=q&sig=4e9e5232d6b21f94b19366ae20aa13eea860d4c3&e=PR76L5VnbA6aMjc_0vg2ASreSVhySPmkTA3f9ScNGwntGDSFWSgTl0bqhIZV0h3krD5P9-z3v3eZBd_ClncSfW1tuXWJ7K22QJgwqzWz_SPRoBQygG-oW8Dnk9Csyqq4OEhUrvbHktEEkjAem7e34tfHBc8L4z7An-UvK_ZrU3IJm41bdB4rwrXg1jHc62u4dPYIvmeOgyqVbAq7DoYv0vLkHoSkDrvypDIQYhE2S4YsS_RR2vnaC5QdpUCbOjGuDXUIYmm7b5tpBmK9BKGpAOA-qFM8VTua-4byGvI0nRBDZxbAytN6OQOqh5bNpG_Le6DwQvNxTvzvASRKpLNtLwPhWIJTKSEZ1w5dzBTCwFVo47hNrVZXny3MIYsuDKdWcUtizdvxVSPzRREpigaPLD6b4lryCeMyHQlaBchzIcq8xuprLAxLF1JDHDLe_G3T56Wj1iKBGPjzhO0Zv9IMb4yayfPzuIGlCIAWZU7m2Huh1tMckcrv_C-LF32bW8LSKipaBDaFzU6irW6EW6VFykT4PIqJV0ufE35MsAvmpf4Go5Kc0JP2JXhwxLlPldn10V4lUk4YToE39aSUosZ15EOqSTfxen3nNiN53hEfsPMCewM23F6gxTt-Y5r7OVum69alAcI0wNVHWSxeN6fxnlITVPSam7-mcZeCLwrPGI8ZzT-Sw5aE9ROYlcXw9Z3uyJMS3c47hnP6bPKstSEXRqiNQOqPfDwAmbPX1XVekynFsfEpBvG6Hu0-4xwP6tXsKhJb9smxsctVHRUh9lTREAkyP0XxKF8pgZslTRmH5TQ__XJ0mCI0G_EpZmCvKUyhJt72IqzX90aonM7YY9OxBoSJTJ9klHeGgejRpGl5lcaWNLbdSvOrA0pKAC_J0xeZVavrBW9o_QHGtcap3d2TETL2LchiriypS7U8JRmt4NlyCa6ZQVQsWqj0tD1jhS7FIHaWYFTgLOGOV9dl4mZNeZwky29X7o3W_YvXXg_jNVJ-VfRHHEvh7lTVmT-rhND07c36XoktD78pBsCTGMSiy0Y5mG4okbwBAg1bgrbC9FBXX4WpOLFEO5GGN-B3JC5iEvnB0lNhZ-bfI0ts6150hHjN4W1JhsACUGhriUEOmGSyFutjCIzk66XRFgbOeWz9M4HKIAf4lEmI1ZkfvnEM9TvFIXttnqV63qF2M6ALttmPm2WsBogBHoOS57VgM5ldJNDiHhafyP6nkXktSENKYJ7za9KQuUzIbqKFTyFm2-dcXKCFvAT-mA_uxzVzx8r7oXKNZuxtBXORNCvVTYAVrkp0ofOzRlAevxqqjWJ08CHLM7NIKkMhMhAGBjSvarPTztmNZ2S4yJfFsVTKGb-mcOzyN0yqcr4tRR5lcfw1yi-TdovtjJhqg2oBI-S2aojxhoFX_dUTXzl4tlNUppDX_upHri8IWlU&prev=RQ2413985A923DCC&p=11&pg=5) * SII Group Belgium * Hainaut Province * July 2 We are seeking an experienced Mechanical *Design* Engineer to join our team at SII Group Belgium. ... Our mission is to contribute to the *design* and development of future products and services for customers ... to the dimensioning and validation of parts (strength, fatigue, thermal, vibration) Participating in *design* ... degree in Mechanical Engineering, Aerospace Engineering or equivalent Proven experience in mechanical *design* report probem [### Senior Digital *Design* Engineer](/clickout/a1c91a35292c8af7?ql=q&sig=d29d02d53c3930b5a244292e4074cb67022f7d42&e=0CpankeW5LL-Cq9y8McgW_51FsYJA_TJr_CmDjxwvZDB-ePagoI7NJmGADhxzXXJdYyqfrrrh1RRV875e86KWrxhcrBtJBYpSqm6JrU2iR2ekR8mW8M5mSP_F7Hkm2xPN3Z6s0EY9aO4x63-K0au91jN4joRan1tGsMQozTy3Ma6KqC1tfRjv5Zn6lnjmt92eOfBwSa73g20tR4SgIi0Jo9emjQKVwqzjzdGbRiKYW_norZLTHhGCViCsWRQpiWTBeHMOj7FEZ6-Kp6QgCoCCEuu5TNhgnrm1v_2Uc_krW_ImLjh6bhnELNcz9JiP9O4ik1w2C7nWaXCE51boDJC5Z-f1c54Q5Hj_dT6xLgZWSOFCjN2BJa1YESwaNv_2ZS9q7y3TY7nZIY9P7tnLjpxIP-SAzQ4crWLZMr3hMXm0tb6qah3S66FHOjaLA68E0HvqqWtd0RXnjdoryyxdmZsC4EJJrlMfintw5ZQ0fb5IUXfdnW0dGi0WJWHqcfVv7kS4AYYjYNWnXiM17rNs85fuoR8td6DZ9sbljh-zOjtD6cD5bDZ_FuXuDp90u8QzR9GwA8CFfvG-GwcRPbawdr9gr0iHicugCO5Wc-EAg1ZoF8A37mlx69NG7pzJUEb2wWFMvTe9488EwX3ctkzIe4gyvpWTUXGr7rZOmnHQAsWmaF351bUZBdA_MUsXdzcA3KP3WyTAyK6t5cNsZacocFOcjQfPIaqUq7zJEYUkThUdns5pMuagLRiY5hYXY8MzzZ0g8JKKLy9xBG9QeoJCT2Qu7kEZz789XSn-GS3Zf_NDiF5Ye1P36nV_0x7PAPX-Gt20I_phEEbysmttd8uXJrbLhcbEFqzeLniDaKOaSW6-oNjx_RPpgHbENB8jPYTAsKvr2wHk3JOYVQ3egenVk8fR7BVDxUk1n2DTY93jmNeHuSn-QJWFO3ZeIf1YzLxgj9d1QHIp6sKvLd7AJtu5PdcFCWRk6yQ_ZqhL_IyFX4qFmy8nRg1Thx3lT2nUTKN7EHcMZesoeFheHqFLY5uP0jB2kLT3As6W1FQNDOaaqRFT1CEvaCtKuRa23gqXdZKwM3rX-1Wj9X2lJRK28mj2rj-MhwacTb4ttxf1-OeJlleJxqtw3Un6HgO2-nt7xO_hMoovEbzum6n1BB73xbT2bu-PVn5IqhlKTALXKH5_YgzqUJYV2mdOySwduI_u-UJzF8kNNxLV0Ve2Nilrfo_VxesXfmFf-hd2tFZB86MQ6461fiAcQ8AdAkhDnjv504cHykqNWJzCtzZGYX0qQ-NJiVkeMUrz2of16Qeig0gSH-9elPju57tInHkiLEu_-YyEinyUng8vDja9Pr9b4bWzFhd2KnOjOrG_2xf3wi5uGggTW9gUP-Mmb72_OCx6scBH-yIf3ywV72o7ePw1vNQltH2ef3dNw&prev=RQ2413985A923DCC&p=12&pg=5) * ICsense * Brussels * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/5db3b680ceb16982?ql=q&sig=6d9f149baeb2ddc2baca1c48b045f39dbb268868&e=ZfGRbtXBKErPtq5Q_k_9nXT7FDGFu-9yFJnyBFZcdALSUxJjhVBFOMAPmhEHcemFBXDu67LbEbYTfnyoHFt8j5X6n0wvsfdY_owcIY0LAtSTFF8uU-UFVO6u1WnmZBbe1gBKbmBOQPr72J2Ka4noZMcaqlC8yk5UsgxiM7s41BdD1L6nJpMOh0etGgro1KH1NN1Lg_WRdDkQWq0JBaerhUZos1Lp8stopDlNNylXA8mSghbinnVRQ4M8K4dEJ7TedV4Kfui3K9WBO963dCbrqCqUV2zNcLw87W9bsI0VUc2XX24dECjOsBC1kRaISi4YLqLI0gmUkyCHxcAMMo_Foj0seikYaUHu5e9nj2ZBvdp_Q595Bj6yi4Mj4WZdXiFyWJMhcwINCJxsDCsDvSeuf7hqJGI3dMqNdIqAkazzTczVL35QmoZmj_ex7UbDp8bW5pz4kuoXY8VboKX88EUULzh0Qvv0FlLtHen2w_pMdoJvHvoNrHHMUSFPBmsXcIGXKtyvlDeBbFITl_Fj3i6HHEbxrN8q2VVDxbcT90vUXSBaWsKmvJlBQHSB2gdWrUb26ilqHp9bW3cDCY2VHg4VLFqwx-jWa7B7XCabN7v9A10VvfJG600aqli7_PU5XGLrbeALYKc6HMycIPmUa5ls9Qys7chN4zb7dDCy4sf5t9eXmAPbRl6phtI6Ue7iRyhqZYPvYXU_gT_aK4dzMh4ywCi66NeYe0_C7Oxg8Df8jrdzy3ej-kYLM16_n5dhcBpqsciQvGkArJCT4xdjl67J1ZOsw58CRFPIib-kUt2DSinxQsBqqxToRG5SqZwsbyjslCSo0DXE75ctC42POSupeanQ17Q1M8KVQT15BnEiQK88id-4T35yvrgRfoJCJfs2uuzXVo-kKHrLyJ7TwCwTBiiMMNRBGWp47_gvPHdFqUsjQXj-FXaf8BuFAjzrYw__0khrRoI6v_jZeH85K5pjDZiwm1H4LvIxRIIAfjnbNS9WOLUt0YCUf6BCYB7Io0PFvFPFE9OHWUSJI3ujmHGY5-47ICSimnAxKFFho-jCHVH-2mE8rxXDsWvT2NRhKfd0K-Ay4uABq4G7I9sTpN2EABxikKU4XAvlLYxh_Y0XVQotlI03B6EzbMVoSfmKj35tfwG3oMQnTZGvh8wy_u9dfXPGiKJBNriL4lA3y1GK8ku7jO5GbZKoSO07DrPNuSftYNFkoNDKlg0zTQISROXvYPY2JNistGfDOqGa3AHtiMOawAzNoTirrC9RbU-rPiVK1IU3uoqDmZpNbdqfAq6G13kdZ-kJZ9keXrvGIsog6VwfD5pL6KUWu-2aqgQviM2MQREqaECRGsA7NbfK2LSxQnZ71tYbTagJM8dlTHiw-l9sA9l2YCzT1zcr_d4RAXNa5zxlk8-mvPhZsUfrfdJW&prev=RQ2413985A923DCC&p=13&pg=5) * ICsense * Mons * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/3d30d072347431ee?ql=q&sig=d7e17e363f7ea4313ddfc4609f39742f0a30086c&e=9ko8YQczT1qpo52JwZc0VEo3_IuxOCwhj8rIKZ24XIzSnNSVH9XzThlApaU71yzYJ3OrRCTTBmkEktBLQB3lGhNZEpYUOE_LwECrV_Ht1CtRTZ6dAQMFllckcERJwhPoi8T9Ms-NYfcRRf90zpU-iHU20X0FkB15Eo2jIKbMhqKJPO_d5cvvGxPayEUWZqB3zRUc56kw8BSWYqY0jmbR1P4wWhB3cJmU0jN0AGwomt-GqoNDqxT3BFWacwkJ4nr3vxENCTITynVD2J_teGDlHY7MJ0wHihereAwTf8M__s-yx4wr-Jv_QQIpfwHBfbezlc4WV6ua3sPlQC0jU_drxnxDPtO0mIyuV84pTe7PHiV_WX7xyIrnt53jg8w9SScF6Z0b6bYXb_f507MqtexHVss8TH-LJo5WJM1o8N49_dJEcgASAHFQrOUgKu4VBl-JaJ9N_GVsRGCJTrsZNzJJ19aNS20nSQTogVqAaDsAJB8_wk5xeM5CILc0FoG2CrdS22yJDvBdkReJujykNRIDPnZtJe7Ozvp9K4BXbZVtqQtOTnuHNC7ZrDpoCwDZYkYeIXpW4jqPRDYXfo8l7g6dq20W9QHcZdzmyAyE-Y33a9F30eqgwIEEL-78cjiAl2bNAKJS8YuFdA29iRQlmvc-dE4GuFlHG1YUPsRvSZ_Sy_c0a3_fP-CBmB9qbj0ZSElN1ePG2NqvkG-s5DN_3R68PoCOvJck1WgYiXPubeBUlOJS4l77iJ8lSloUgyYxJfcCOfsUh0nxWbzLZruLmWQ1IcwBvrPoCoz9X6g3O_7avUzqgIzJJu-gxlQCSdbkSPIdcD1jg0uVKQ4VeXpu5aOLOcryOr7g4VqgcEHUOiGblihSxjhRg87kLc4JAVQT6gdWj_SiajTwZ5_56EFL826TE-NumkpsfPJh5tYcUrdtokZOGKAo-XnFcCgQ8LBJKuCafWCOo2mzCpM55UX0f2jWRa7MD8F6RBn5zRNvwe4qzND5gtByKytAF9fXkwwdBXQgY285ZukAY_XK0E8uBSYEjyMOLddQl65gNxv9tBlL2i7AKe9_xZd1Dr41ApJ6SXuqAW389-Qhegre59PPJI1_TKbOB3VPie66bvmUZlyTCbSqk9QJ4NIaXRfjpba52OSgqe2P207vsvp0j2wE02vyUtAy5YX3iQrD-EaunI-qniFoItNCP3qup5r2Cgsr86h5nA_T9AyIuREFYhQWY7DqoBlQmY3XwoNcB3P2GGSDcIfiV30HY3ORJ_c9fn6ZI54-VCzgBMPySgq010iz8eJNkfO-ZKhLyk2X7vTNfQ0AoFcbDJ8Ch7uo2I5R__TP0evXnzZOrFwL9yUnxT4SECYYFFroyj72lDoyOq-bmy3guDYzKL640r5wm6oTY24l7OUSc74hh8ZwLrKyTICHiU1D1w&prev=RQ2413985A923DCC&p=14&pg=5) * ICsense * Namur * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/a7a22ce60a3405b4?ql=q&sig=1bbaafa4a520d2b8e0d6773021304929615d11b4&e=EdAz8ERBjveeG_7t9UtpddBoA_XQwCNZQdPG_MbvOLBqZ4IfTVXZWkvrtQS55R3G1P3J8ecOl8_0T360pccfXIUTZs0fOhidWgglVTToKdN18A_5GprCoRk-YgELQju69xO0SbHpgUkEq-01JGfyvmV9Atx2cxERfpXgyoecAW2ifm44rlw5YcaAtZhLoB37_oZWXHP-M8MCW1aDwbq2H5CVaArE6dR6IvZJgKAXhIy9s9HoqCwJ0AslZdoCCJqmt-LYuwCV07lHl0RZnJdqAgW4BdR4pzeEWVKQ7RAaQlL8rN2uJ1u7Gu_4tKwC5f3U5xFjx8u3l8_tXS4aTB9i4P6OttIXgfTF9h0HEOLljrJckvfuENRMX7HnL0Rs8ixP3n9OG6tR7Hf9L5scX5jJlS2hZi2Dq5MO3tZ9ZdJBkWErq0-2ZnL31fnH9d7xqR_NOSFs2jn6rGTtVnjemuys7W-BiWAIkKseWfEGwbanodcPw3ckQARy8KLdEv8lLdNHYlVPcV_vD9DWU72rI0m3O17zPXPPWjqgDySLrDWQK-GBou8vOKT1PgK1MloKtXEMN6X4S6Ta8qY4OoJRQxan8mjM0eK1S5JvZLgNMCcdMunsR3Z1U1EmNlZIH7oLfq8G9Y52-3hK2J9bhh5kbEKjBP2zdToJVjY4E4JLNootv8UuBQ8rrrEitITpMmyC3brRLxX5FmZBGhw_XaHfDBEr6TTi5Ui6kDm58FPoD_Dk54KBAapqnBHwBvNN-kFIDVZTO-07fGufUKIqOsx_WBMf9Ti9vxlmkh7aJUABYZGww5lfFEGLoVswI6-t_cx-f2nxL3SaC9keJynSrvelGSptA_vng3IdnSacH90rZTjOo4xcRk0lLMpIoA4EexmMkfz_PYGv374vSWqAaaRkAiHwumR6Q7QyTfYWkbLvjS5Ge1nhefbNVQvKJ-tqCFvpj4DPq1E1HX7aUo6OS0TdK9aDeWd4KvhE-bpTk1pCDIAMcQTj3rGEkKlbBCXyej1Kfw9kYsOsTFxKmiO_IjYesW04zWNNNXqMgDhY_osb8PcPmifnD4Kgr3W3n9dCXDZHG2v4-svlrZ_ZXdNiKf_pyVH-vBbi2OLpAmt-PGjqCD8Z2KA2i1kd4ULjSabmkyv1HtDHYUEW5HSn0_yAFHOnRvohJ5TJl1UobWD8KJO8pksLfc5U16qgVmyAY5GhwhDN72Biohz6rf_5IUsvCIvvZzl78lYpgFihh8Ks568RTlHF7uj3tyA0QVt1nGX0x59PtYZoSAdu0J8bFzRvWLz60ixJGhuEncmqiI6R1Jpeh_iT6AzGcB3a47UbIAakuBbNa8MCzJsHbw3_-1LBDw28glhzDFF3BsYwGnWEXCYraRQAw_yqOw8LrPL5E545uU3TMgbKoduxuBXzdvW06r89kfF8mQ&prev=RQ2413985A923DCC&p=15&pg=5) * ICsense * Ieper * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/2295117b3b27d7c9?ql=q&sig=cae1947df4312be9dd8ac26a44539042f7219c5a&e=lvPmo6cbtuX2kaM99WeIBwvH-wpE4k3xOTPRZ5sJMZdJsTJUjAsJDEM_hQOlRgMuXqhlR_XPqTU93iC6WGxH-eF5PpLuu9phE2io9YS-kTGZ7XA3iGbHUp8Ztxk-jQ2NuJ6nE3MRlaOMuBM8_870QujLe3affEBF4V7C3U50DibDmG2-zZe2WZPa6HQE4HioqdjMt_gsZ5DnYcr_vfgReCqMcpGWUdkRqluye2RvJ0ITQJoEB2tQhoGkMZT8eMlgMbClSKYZaZFjlGOLTm-G_u422TnEbPT5mk6jxGqw2GowU17c9uWIRaTTvZZ6ED_nbhwFBsjuI0eOXyusM29JdoBYtPYmyejg1Vzom2WzuXa9h00nDhGcKkCtQ_YimqzlRdUByOJ1sP12kzSPVWy7tvq96PFJj4zkNameyumL-ysQ8cufU4x2RNSsBG2NvGq_kF5XvLgeSzVW_zHEjwODqvg_8ZynucmrRpMxKQjyYb9x9SXsQyOflYiw7vR2EYThC2yJWStBGHNMKG0XiH_FUzd9KnCb2UBmOzmK9C6tLSIVi68bs4M--fgMuNw4YiDnovGQ87v_yvy6iOjrq9ZcOIFS-vmpTyAxb4lJG9Q6uxX9z9VOSUP8Yc6d_5-BLqQc0VoUW_ul96dT7YX_7Fy1sc7LIGW0ysWrWMtecC8DptXHewjU9cFceFb6ElJfEgx1EDHSc-fN2T4votGHxLnybTiqgckQ837xzkQz7zJOvZFLguH22P7SulL-eckzkcAhMce5ccEn-_OSFJIhYnCWFF9MHc3WVwoiGG7s2eJkVBn5Xjg0yY7xSfCj53RNN1vBwkTeDX6oMUQli8OwfyZhHPC60mLturOVTW5NBUGLFr-NoQ318CIfotOQ37uLpQNloCvgEoxpUed463CLiG30vtxuVfPRwNvH6OBDKkn_PimIgpntSIEQHvK-afHEcpfzehBU8XtPqY6g2vchdMY01Cb0fkkVupmUNWk89dOxhx20C1_41ULJSOs2B7zFokN4W6NaO_d-iLQ1cWky9KdYFUJTavqW_SqZusUpPR3-BzaezGnuhbRDiH4mTK8FRGSgzIjGfwD6ZY2au5JwoRPNRG3MFndUi34HOWZZd_Akry70K1lro7tLmfneUM3kNQnHghiR0uknjssTwkVCFbpRkOJaSeKza65TeApqRqBpt6fqd2S2OhuvmobQaRVTkweQqkw9SvYYTv2p6cFfMGMd8siMi7pxsqgKBXeoCCkEnVA8d50ZIbn9vb55ERPWGrq0oRwKDVy9D7ZEED5WRXxBPjblB6l1HwccMFvV5j0YV2kaxPGv4lMPiOBsdggYexHxSN0kl0xa2ICbaKWAifHElcE3NS1jvu9zGvAEFWrvcVvWWbUnmBRIXUeBYzS0pNoZMVfU_-e91YJL1TK-Qn6T674vnQwu&prev=RQ2413985A923DCC&p=16&pg=5) * ICsense * Oudenaarde * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/4ff2ff5380f86608?ql=q&sig=a711d2ee1b0e403066c8cbae22037627c7c9219c&e=7y3rdm-Bx7T-UvZdfI63dT1bmbg3kpRRpoMnsIdmkHuFOyZAzKK_M7xAP5o3oxktlbvX5Tmq0kvPJQllJmoyTIuFg8n8P0nq-MHq8vmmfvW1UVz4xf9ozA8R8sGw5gLNnf0W2Rg2UKQl7XZUwC-RnXYA-zOj7BC7PLkZnHuVCJziaRsH2nwLeKUY-5O61-1A3jFng32NqN_F-a27WcRb9S0zw6GDiTqf8gexTPLKiFBrWAyjPgGZlY0ylTNQJwpb26wwhnbpBGR4m0dD4rIQI-gtuhSIzoKPmLMG1ccoqZlWF2paGR0bfYQ0BZW2zGlSWS76vLHrNqiaG5WiEEHVO-zZ65keUq-nVf4qvhcMUBrLazuqs8gTO4OfcAUKD89HdQ_njsvh4i7_sZ33w_-gT2P3LqWL4baJaE9ASoi4j3rs_WRwbgj0mbYAMg83CNp2iqs1_pK8UKXhgIGFrxKePnpZxkAQEMHGza992ZmeQ-0Yfcw_Z8x2NSKmjHEgMQiL4ZCuBj20QpfGjohO6KCn-hOnSPEKvgdCBReSm8XsupiUXl4ZW9vtDWusyBEIyACPHaLIOyDYz90xdUZgd0Jog0cdwR_8jzCXh4Hz9hyqyeqzRUccpThrg92j3nfztMivO1D8GU3zurnTGGEAT4hZGZcQWkWA6wG_w-KAwu-4XzvSJ5HIGTmrbT2e6LmCiT-GfquLddeyHigQmR5zICBzfcKMR-YsNLFg8moCfOvkqH6pV-72O4L7QOlzZgBb7Nj9gX-yikrvsBaSmJdYdWRx8ZWYi22vvWREmCnRm-tRcgiaTcoJu3iwFGQA4OIAP4l6MO-d4iJE6cEmoyy7phHPGqg3EawNQ10iDgLmHF4_YyEHHaUCx_AkLpszOwJIK8Jppc_nyTNNFExQjNnLGWq7Rn0uxX8mi7MSNQw_NGKuC0tYOBEYM6HIgvq44hTv8zcy2tV3NM_ON6OEiQ3NxWPdTfNwurtaq-MAQL5Xo053PfSbzi38ijfBv2GPSDBD6-csYVnbYJrEAZfSqNGnkOoPX5eBISXPLxac9vMWddVItwVG0cxWJpO8RExzTar5iRuXQH7gsZTgf5ewf2Z7a0R-djEdHyJT4oBxvu2jUxoIKTnyg63kF9_VFc1xkYfvUVnCYc3cvuZoGT4mZgLnYPXrbmqdKhM5QVNgX4n6CqurZpzTAimywhNiGADnm2gguxGFyw9HAHN2b5oy1uSc7AEodA5VIRquFOKITRvt2-7KvegVJbXis4daS62Kgeqe6M2HmVhazKgJMWNAGapzuWRg16jZl6hpzmvqJrITy9hGYoKegi7PvG11Xy5D_0LFmRfstR_Sa8W2Zr0jCubEWaiuZlAPJI6cvIDXrABj5jdPZufaro1dgRiGqsHrE2ee6Y6pNK65UB7nHJ9F2LaILAXD5JQojLs&prev=RQ2413985A923DCC&p=17&pg=5) * ICsense * Roeselare * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/6d68863f48785a8a?ql=q&sig=ce8453bb43255dbcfb0152181921bde4340d96f7&e=Pz3ZTagQwnAMSvPGJ8R8kV2LKatwfoXERjihc7FrIsfuZPE2JqrUNdjFL1oAtRz0ps2KfCSXM2-dEnPVVkoraaZ_Czb5Wr_z580O5LG3bOH-H_vcv1yMakP3B8UHXy-8NTY1cgF197A27FQqORlm2-39ulO4kled_M-_kDYWi2ZLqqQ0zU7emiekygWDebePuXOKAu06krbfpHuUlzZt8R3hUZWj_QrGpCetdKJaQcjcYq-W59qfz-roVDT8hzYSGUGCQKhUfLX5CLfyS5_Dovmm1RXGuVhC0tr4mhLAOsjdfcWeSyPkmvIccTF5xPvDj4blXz9cVJtJ8CcsaL_JrN4-6cpOMU0a-PlgBSpGaSB1su6BKpvduX3TTBS0BGgX1aOPKcWi6ogU8HVWnmNIKuEb5sN_e9FrV1_CLp6lyUECN7xQG8oP4cl77sWk3P-Z14ZzDITwzFa1ROooNA0Y39GM5jdbLpxaROeuorGpkGzski_1Sc2HQwYF7jxRmfpLjvB-YTNWrteUxNCKvyQH3XvJ42hdw0w9_Bb-ZDSfL38Z40AsMYV3Hd6W44fa-RCgYrXInEgllG1Argi031iYAPqbn7IzN-E9nzuLNWSTz0tEnViv3W6VFZFaxxTMlsfwutuUB97SCvDLDY0nfuVjGXYDbYXzgykR7EUSScR9FMFqfUGGmCRHOJCSAHwK2WP5qSo-V6SbFskJdLPk855cs_IQe5NdiR1ZNsAGhuvxC3skFPKDHureftUYdyTrJkcGNscSgNiN5Q0xY1f_7LhVrIn07deTFX4VSinaiMU4rsl5p7VvSc4qvzd4nWPG3-I7_KVLEpGUNYQv9TFxFYgUGcepbbgJYcZZsHyEPj42RVgyvh1EsRbJ1fvl3-ZMNihDx5x8wnA5bUBRGA5z6Gs1DrTLt9cLhrx7AMIgPFeHIWKa5DCFKj9L5YsphHYax53q_-6ne4DE3hoVPbsnBdM79eq_Tuiej0vussFqfCr4n3LudKCfE9RNdCFmbfKXOZNc1JFPsMH1ZMfQ57h6j8epyaLK9ONMssaHpRBpbON1IqEWHwblBhtV1i2iy6AUm7EliUlOK5Fvdv3tWFXkC3zBTz3TXKhLM1a8O-ULtBiPxQVYjyaZVJToSNHSnFmxPsM8zH53V1FVhcxCpFldEizzTPILLsjl7Vr-vD-5BfSzHr1p6SwiBZydDAqqcWLy6n4zu1Jva5db0XZD8BxdJ8Fz50nAdcK92NuB6SDFgafXhq2I5SQNizmUoNvVaEp4aJBOfwnLAslBrdNIlFAdRF6pkJ-hObrUjT4enzPVTdjp6BMyoGcIBbMeWp-Ee5U-2GD4UVBDFgjVsw0EyA0SFwJbKntZjwGk-v1qRS0KTQCmUm-ajfQanXwvCRlMZL2U3LckWYbgM2aOinZajF12TifFvnA&prev=RQ2413985A923DCC&p=18&pg=5) * ICsense * Leuven * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/636917c0433e735f?ql=q&sig=59870de17d14537d705605367c04376a33a92bcf&e=ZhiedScsDAlQDPnG6zRjRLh_s0FK-vmjGGGsYYldpfpV3I2mI7Ffb9bFtReqcugvME0c2eOUqM2HTFZI0uUEYG9xFMFqxp7ECNFdK6fFgZpzlYVsAq1IxwfFuriU0x2wGhQRHUaWPRs6stYafMdg8vZXZs7nrYg7LDkL6guXAc8Jz1zLXYV6eE5LvYEc4IBaTXMIYVhL0BWsUGY5xV94voZpC9pHtfp8e6h9bZX8NSTKynVNHu9qdegc7Y7B9bB5_jSSTflNyOiFCAW35MCIm75FYZ0s0vspv_Mr7167YS68NrYTgtaJKN8IM95d625GSeGT3H3JBWZDIontVnUglAZuOselx6l6hyVT-k8qnBgHQmvrEvMe6-paoykA8uzfQeGxj5p0LmDM8E-jSGzOdd4nSEVmvZ1IfPONUdTzcVPSkLqgFtq6zAOo6ccE-bO6YLJp9w-qkwuJZWOQRQekI-LtE2rUr-zaZp3dmf-MZCd-3mDWEEZXrDrVUPK042DTadxiZoAETK_gCDNvSTalFbg9FKtW4IViCLv7438m5MrrVTJlXDei1ufNpONcOq4OGQtJvz99MKDheM9gu3hAOSmeC4Lu1tqpR-vYxxmKqBuygHXSArWac_RpIVN9JSBNSz0gmAGg7PyuAbD5b0u-MjB1GcA7RzXy0TF15SehU1kf2Gw1TKbQdq6BEP77Y-wkargw497e9bGJtzrXvrTpzfYSOe4ZLefKf6Cb7-phYpgG4HlKNkYdfsJvJbAMKZuDh7_KXyeqK292Ddx-MKms9SB1cetqoK36_euL8cOLW8WdoNizRzZvDOpxOl2KANdJspkmsuJ7EWhX78RMltOCIh5wk5YuMfnYW9lvZP_Cf8vXHSKrDpj_zZZ2tz1OMwVDH3qgF6uR_reBkZ9pvvVa3LpaG_8M4afDl4vdkB3H5alWPkDBhesujIQBPjFxjKAn6uuXMuYw1xaRM5wYAU9kLkGcXZ2UCwWeDFL6l66O9360wuXAfs6NpKGLagqWlttoUbVVipyTyYJ6fBjxfDNx7rGt27Ye2rvgumPip2vs1SAq3h4EKzZKtLCsjYlahLpWe3q5F1k2GYXdz1KGWmQx9qDVi2z3mEzZGvqwkvoTkyeKTIt44cWsB4uKuaCEveu0GXYOgfT-gOapa_LXbgleNJcVBwTDWkjiexwSY4G_tNjvk3zQ5qOvWh5xDuJckaftF7DinpnITq_i-zpwUMdytpBEfsv5T-YM0ArAUHyKAqipZA_wFJ6uIAtCzhxsg-xL8vANQJhP3T2GIHE5hyWXBK_fGECz7Ld8u-JTKtn9O7qgHlxI0Y8XSZbBIQms6j3TBWBnnnZxr5Fbv98_xszhxULKR4YGAjp91uaMoJHaypGeQKVkTDFvTrpJ37-4wXF5g-J_X7D90JSXQayuZu_6dA&prev=RQ2413985A923DCC&p=19&pg=5) * ICsense * Aalst * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem [### Senior Digital *Design* Engineer](/clickout/0a458ea68f6fae72?ql=q&sig=90625d72ebc9d34f33361cdc288e254fea7470ff&e=2k9l_QnNaP1an77IJgg_LvMAJAkHv00dAiwSHDL6EJZKtcocIxHQUBVKrYd5mk1zWsy6pHQJPvZewVztudWR5BcLfQlOJul8Kd1SNIqQSYubUrksjUMYv-dHC6YqgqTAn2JVmnADLwy5Ka59N9XAi_CuonYk3GSdDaDljaKThbkMzxS5TxIYPQ-Ucl8N86DFBUyKW48xKvlQAQcFUf8uXuEKU0b4qhitx1kmYjnHjrtjniAqpeL69d_407QrFWMXt_ALKqpbJpGCJbi96sFZmIzkNISOJWAg-rgqdJ_658UODEtIBGiUYy1iJHYZ72BnKRXoULV6ItFDYluDEEpKmZciTrtbzCY9I1bswx7NiTWp-TsCARa9U7rLSgCElTK7BpN6UFE-K0ML-FMhOPUL0ghHsJJl-xbpYzK9bB-3n-oEes4hwfMEEAKhFY7df_RdOEgdCL1PI6nufJhCqWoOSunda-X5HZT4WPT82ABOvIjGcvIm18WnewEYdsp9PTr5NVlafLuxsZFefxiSuRR9xeQ4RjdBlb-hfziN4kYvHi7JALNx0pPCFZ-r2UETE1Y-r_iaJ9k3t9ZVkklx3w1DJnfGYPlwmd7MgFHSO93wJE9NJRmdP2mbb5R3Po1_LWostBDqwJ2B84aakah75MrQnzO250Z8M6Rfb24hm9_XdueEDpbBF8pULOQIatFfH7o1aF6wKBwuSo1r-BambiX9bbLHGqbpAVQBAhvy5dlwkXJwhW4p2bWOenSUmN0YQEUMGsYiVHrHj6_4uuHdNf1DYcnwauNGQqBil_UcNaSkl-nEa4lrha-WiG89hGpuIDo7KrnS2bHlMCe5d6GZQUh_rfL-ESvfkKyS_EIbSvj9gF4-MEYk9XX4cdH0s2yztGQrC0K0qx7TIbpYS-rVXyQDbeQJyRBRuvF2kqJj_MfPM8trLnh4X_1c7uSLUZwEVo_ozuf7jgqsJ9HWk1Oxy2JMgCCb3pBIGqXKrPbgeDqEzMbXqUUMimF-MwS6Pm8gFnmI2Vsnm14Z0-ukfR_doUqylB-3adcz1Pjs0b3UPRPSDXvPbQ0blcyk7tDhE3KI20uqiKP4LMOlcK9MB4eZc_9bRwtnHwPenIoH9vbnk3w2ZUCKdXVf7AI8-x2q6BRaPZXEXyNzzUeHm_R231S3OCwWlFx3OWU05O1A9NuYAmKdsvayN6SZg2du7nee_yrzId8yjGoaFUMJ15KgmJRqKCSAuRrmRtCtZRr4NZrGDgDWUK8y5lax3OwomOUfEtjNb99DIw7S3obUa01K9nF-y99-eVCoS4c2h0oMtzKVOH2-nfhGnA5XniFT3NPsmMwxkhHs83fCvoSS7gwWz4Puz_c4zDYtwHhpd73ue0Sad2cvBnv8cbyKIfQvYCqEu9KreeUrcGNIGBeBabQkcvl18Qs8BOMkbdM&prev=RQ2413985A923DCC&p=20&pg=5) * ICsense * Charleroi * July 2 Scope The Senior Digital *Design* Engineer is responsible for the study, *design* and verification of high ... Responsibilities Study, specification, *design* and verification of high-quality digital and mixed-signal ... You have experience with front-end ASIC or FPGA *design* in VHDL and/or Verilog and/or SystemVerilog You ... You are a dynamic and highly motivated engineer with at least four years of experience in digital IC *design* ... of the following protocols and techniques is a plus: SPI, I2C, UART, CAN, LIN, SENT, DSP, CRC, FSM *design* report probem Email me future jobs like these → Email me future jobs like these: OK * [«](/jobs/design?page=4) * [2](/jobs/design?page=2) * [3](/jobs/design?page=3) * [4](/jobs/design?page=4) * 5 * [6](/jobs/design?page=6) * [7](/jobs/design?page=7) * [8](/jobs/design?page=8) * [»](/jobs/design?page=6) [next page](/jobs/design?page=6) * [«](/jobs/design?page=4) * [2](/jobs/design?page=2) * [3](/jobs/design?page=3) * [4](/jobs/design?page=4) * 5 * [6](/jobs/design?page=6) * [7](/jobs/design?page=7) * [8](/jobs/design?page=8) * [»](/jobs/design?page=6) #### design in Cities... * 593 ![Brussels](/public/img/coa/be.brussels.png "Coat of arms of Brussels") [Brussels](/in/brussels/design "English jobs in Brussels") * 182 ![Antwerp](/public/img/coa/be.antwerpen.png "Coat of arms of Antwerp") [Antwerp](/in/antwerpen/design "English jobs in Antwerp") * 175 ![Ghent](/public/img/coa/be.gent.png "Coat of arms of Ghent") [Ghent](/in/gent/design "English jobs in Ghent") * 140 ![Leuven](/public/img/coa/be.leuven.png "Coat of arms of Leuven") [Leuven](/in/leuven/design "English jobs in Leuven") * 96 ![Charleroi](/public/img/coa/be.charleroi.png "Coat of arms of Charleroi") [Charleroi](/in/charleroi/design "English jobs in Charleroi") * 87 ![Kortrijk](/public/img/coa/be.kortrijk.png "Coat of arms of Kortrijk") [Kortrijk](/in/kortrijk/design "English jobs in Kortrijk") * 85 ![Mechelen](/public/img/coa/be.mechelen.png "Coat of arms of Mechelen") [Mechelen](/in/mechelen/design "English jobs in Mechelen") * 82 ![Liège](/public/img/coa/be.liege.png "Coat of arms of Liège") [Liège](/in/liege/design "English jobs in Liège") * 77 ![Mons](/public/img/coa/be.mons.png "Coat of arms of Mons") [Mons](/in/mons/design "English jobs in Mons") * 66 ![Roeselare](/public/img/coa/be.roeselare.png "Coat of arms of Roeselare") [Roeselare](/in/roeselare/design "English jobs in Roeselare") * 65 ![Namur](/public/img/coa/be.namur.png "Coat of arms of Namur") [Namur](/in/namur/design "English jobs in Namur") * 64 ![Aalst](/public/img/coa/be.aalst.png "Coat of arms of Aalst") [Aalst](/in/aalst/design "English jobs in Aalst") * 64 ![Ypres](/public/img/coa/be.ieper.png "Coat of arms of Ypres") [Ypres](/in/ieper/design "English jobs in Ypres") * 63 ![Hasselt](/public/img/coa/be.hasselt.png "Coat of arms of Hasselt") [Hasselt](/in/hasselt/design "English jobs in Hasselt") * 63 ![Nivelles](/public/img/coa/be.nivelles.png "Coat of arms of Nivelles") [Nivelles](/in/nivelles/design "English jobs in Nivelles") * 61 ![Bruges](/public/img/coa/be.brugge.png "Coat of arms of Bruges") [Bruges](/in/brugge/design "English jobs in Bruges") * 61 ![Soignies](/public/img/coa/be.soignies.png "Coat of arms of Soignies") [Soignies](/in/soignies/design "English jobs in Soignies") * 58 ![Arlon](/public/img/coa/be.arlon.png "Coat of arms of Arlon") [Arlon](/in/arlon/design "English jobs in Arlon") * 56 ![Ostend](/public/img/coa/be.oostende.png "Coat of arms of Ostend") [Ostend](/in/oostende/design "English jobs in Ostend") * 55 ![Genappe](/public/img/coa/be.genappe.png "Coat of arms of Genappe") [Genappe](/in/genappe/design "English jobs in Genappe") * 55 ![Oudenaarde](/public/img/coa/be.oudenaarde.png "Coat of arms of Oudenaarde") [Oudenaarde](/in/oudenaarde/design "English jobs in Oudenaarde") * 53 ![Sint-Niklaas](/public/img/coa/be.sint-niklaas.png "Coat of arms of Sint-Niklaas") [Sint-Niklaas](/in/sint-niklaas/design "English jobs in Sint-Niklaas") * 53 ![Tournai](/public/img/coa/be.tournai.png "Coat of arms of Tournai") [Tournai](/in/tournai/design "English jobs in Tournai") * 53 ![Veurne](/public/img/coa/be.veurne.png "Coat of arms of Veurne") [Veurne](/in/veurne/design "English jobs in Veurne") * 20 ![Wavre](/public/img/coa/be.wavre.png "Coat of arms of Wavre") [Wavre](/in/wavre/design "English jobs in Wavre") * 17 ![Geel](/public/img/coa/be.geel.png "Coat of arms of Geel") [Geel](/in/geel/design "English jobs in Geel") * 15 ![Deinze](/public/img/coa/be.deinze.png "Coat of arms of Deinze") [Deinze](/in/deinze/design "English jobs in Deinze") * 15 ![Waregem](/public/img/coa/be.waregem.png "Coat of arms of Waregem") [Waregem](/in/waregem/design "English jobs in Waregem") * 12 ![Ottignies-Louvain-la-Neuve](/public/img/coa/be.ottignies-louvain-la-neuve.png "Coat of arms of Ottignies-Louvain-la-Neuve") [Ottignies-Louvain-la-Neuve](/in/ottignies-louvain-la-neuve/design "English jobs in Ottignies-Louvain-la-Neuve") * 11 ![Torhout](/public/img/coa/be.torhout.png "Coat of arms of Torhout") [Torhout](/in/torhout/design "English jobs in Torhout") * 10 ![Harelbeke](/public/img/coa/be.harelbeke.png "Coat of arms of Harelbeke") [Harelbeke](/in/harelbeke/design "English jobs in Harelbeke") * 10 ![Sint-Truiden](/public/img/coa/be.sint-truiden.png "Coat of arms of Sint-Truiden") [Sint-Truiden](/in/sint-truiden/design "English jobs in Sint-Truiden") * 9 ![Tubize](/public/img/coa/be.tubize.png "Coat of arms of Tubize") [Tubize](/in/tubize/design "English jobs in Tubize") * 8 ![Turnhout](/public/img/coa/be.turnhout.png "Coat of arms of Turnhout") [Turnhout](/in/turnhout/design "English jobs in Turnhout") * 7 ![Tielt](/public/img/coa/be.tielt.png "Coat of arms of Tielt") [Tielt](/in/tielt/design "English jobs in Tielt") * 7 ![Vilvoorde](/public/img/coa/be.vilvoorde.png "Coat of arms of Vilvoorde") [Vilvoorde](/in/vilvoorde/design "English jobs in Vilvoorde") * 6 ![Genk](/public/img/coa/be.genk.png "Coat of arms of Genk") [Genk](/in/genk/design "English jobs in Genk") * 6 ![Hoogstraten](/public/img/coa/be.hoogstraten.png "Coat of arms of Hoogstraten") [Hoogstraten](/in/hoogstraten/design "English jobs in Hoogstraten") * 6 ![Lessines](/public/img/coa/be.lessines.png "Coat of arms of Lessines") [Lessines](/in/lessines/design "English jobs in Lessines") * 5 ![Ath](/public/img/coa/be.ath.png "Coat of arms of Ath") [Ath](/in/ath/design "English jobs in Ath") * 5 ![Lokeren](/public/img/coa/be.lokeren.png "Coat of arms of Lokeren") [Lokeren](/in/lokeren/design "English jobs in Lokeren") * 3 ![Dendermonde](/public/img/coa/be.dendermonde.png "Coat of arms of Dendermonde") [Dendermonde](/in/dendermonde/design "English jobs in Dendermonde") * 3 ![Herentals](/public/img/coa/be.herentals.png "Coat of arms of Herentals") [Herentals](/in/herentals/design "English jobs in Herentals") * 3 ![Izegem](/public/img/coa/be.izegem.png "Coat of arms of Izegem") [Izegem](/in/izegem/design "English jobs in Izegem") * 3 ![Rixensart](/public/img/coa/be.rixensart.png "Coat of arms of Rixensart") [Rixensart](/in/rixensart/design "English jobs in Rixensart") * 2 ![Heusden-Zolder](/public/img/coa/be.heusden-zolder.png "Coat of arms of Heusden-Zolder") [Heusden-Zolder](/in/heusden-zolder/design "English jobs in Heusden-Zolder") * 2 ![Lommel](/public/img/coa/be.lommel.png "Coat of arms of Lommel") [Lommel](/in/lommel/design "English jobs in Lommel") * 2 ![Lummen](/public/img/coa/be.lummen.png "Coat of arms of Lummen") [Lummen](/in/lummen/design "English jobs in Lummen") * 1 ![Châtelet](/public/img/coa/be.chatelet.png "Coat of arms of Châtelet") [Châtelet](/in/chatelet/design "English jobs in Châtelet") * 1 ![Herk-de-Stad](/public/img/coa/be.herk-de-stad.png "Coat of arms of Herk-de-Stad") [Herk-de-Stad](/in/herk-de-stad/design "English jobs in Herk-de-Stad") * 1 ![Leuze-en-Hainaut](/public/img/coa/be.leuze-en-hainaut.png "Coat of arms of Leuze-en-Hainaut") [Leuze-en-Hainaut](/in/leuze-en-hainaut/design "English jobs in Leuze-en-Hainaut") * 1 ![Mortsel](/public/img/coa/be.mortsel.png "Coat of arms of Mortsel") [Mortsel](/in/mortsel/design "English jobs in Mortsel") * 1 ![Seraing](/public/img/coa/be.seraing.png "Coat of arms of Seraing") [Seraing](/in/seraing/design "English jobs in Seraing") * 1 ![Thuin](/public/img/coa/be.thuin.png "Coat of arms of Thuin") [Thuin](/in/thuin/design "English jobs in Thuin") * 1 ![Tienen](/public/img/coa/be.tienen.png "Coat of arms of Tienen") [Tienen](/in/tienen/design "English jobs in Tienen") #### design in Provinces... * 593 ![Brussels](/public/img/coa/be.brussels.png "Coat of arms of Brussels") [Brussels](/in/brussels/design "English jobs in Brussels") * 469 ![West Flanders](/public/img/coa/be.west-vlaanderen.png "Coat of arms of West Flanders") [West Flanders](/in/west-vlaanderen/design "English jobs in West Flanders") * 392 ![East Flanders](/public/img/coa/be.oost-vlaanderen.png "Coat of arms of East Flanders") [East Flanders](/in/oost-vlaanderen/design "English jobs in East Flanders") * 376 ![Antwerp Province](/public/img/coa/be.antwerpen-province.png "Coat of arms of Antwerp Province") [Antwerp Province](/in/antwerpen-province/design "English jobs in Antwerp Province") * 311 ![Hainaut](/public/img/coa/be.hainaut.png "Coat of arms of Hainaut") [Hainaut](/in/hainaut/design "English jobs in Hainaut") * 280 ![Flemish Brabant](/public/img/coa/be.vlaams-brabant.png "Coat of arms of Flemish Brabant") [Flemish Brabant](/in/vlaams-brabant/design "English jobs in Flemish Brabant") * 216 ![Walloon Brabant](/public/img/coa/be.brabant-wallon.png "Coat of arms of Walloon Brabant") [Walloon Brabant](/in/brabant-wallon/design "English jobs in Walloon Brabant") * 95 ![Limburg](/public/img/coa/be.limburg.png "Coat of arms of Limburg") [Limburg](/in/limburg/design "English jobs in Limburg") * 90 ![Liège Province](/public/img/coa/be.liege-province.png "Coat of arms of Liège Province") [Liège Province](/in/liege-province/design "English jobs in Liège Province") * 80 ![Namur Province](/public/img/coa/be.namur-province.png "Coat of arms of Namur Province") [Namur Province](/in/namur-province/design "English jobs in Namur Province") * 63 ![Belgian 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